Hi Sir,
Our customer used the TPS22913B & TPS22913C on product, But have some question need to clarify.
Could you please support this case for me?
1. Were TPS22913B&C be passed ESD test by JESD22-A115-A? how many sample size?
2. Were TPS22913B&C be passed Gate Leakage Test?
3. Could you provide internal Visual inspection (,SEM cross section) after Temp cycling, Autoclave, and Biased Humidity test?
4. Were TPS22913B&C be passed High Temperature Operating Life test by JESD22A-108B? how many sample size?
5. Were TPS22913B&C be passed Preconditioning test by JESD-22- A113B? how many sample size?
6. Do the IC package used the plastic? If yes, please provide C-SAM test result .(used to detect the risk of IC cracking)?
7. What's the material type for IC Package substrate?
(1) ENIG ,
(2) Electrolytic Ni-Au,
(3) Solder on Pad (SOP),
(4) other?
8. Does the IC have problems with Dendrite growth and Corrosion?
If yes, will it affect functionality and reliability? Please provide a verification report and explan which function will be affected.
If not, please submit a verification report to prove that it is ok.If the PCB is used inside the IC, what is the PCB material? Does it use the ENIG?
9. Supplier has the documents to show known failure modes of the IC technology used and can provide references or documents.
10. Could you provide Package assembler & Location?
11. Could you provide Substrate Technology (including dielectric material, line/space, core via pitch, substrate layer stack-up & thickness, number of stack vias)?
12. Could you provide Substrate surface finish for the solder ball ( E.g.. SOP, E'lytic Ni/Au; E'less Ni/Au)?
13. Could you provide Substrate layer count (Signal/Power/Ground) total. For build up substrate, number of build up layers?
14. Could you provide Mold Compound Alpha emission rate (alpha/cm2/hr) - for wire bond package?
15. Could you provide Bump/Underfill/SOP Alpha emission rate (alpha/cm2/hr) - for flip chip package?
16. Any passive component (e.g. by-pass capacitors) in the package (Y/N)? If "Yes",provide the value, form factor and the way they are assembled to the package substrate
17. Could you provide Maximum number of power on hours (hrs)?
18. Could you provide Max number of power on/off cycles (cycles)?
19. Could you provide Verification data for the design / process / material not prone to dendrite growth or corrosion for IC package at IC packaging CM
(1) Confirm for compliance to item (Y /N)
(2) Provide Documentation(as needed)
(3) Frequency of failure (Provide history for last 12 months)
(4) Corrective Action Implemented & date
(5) Communicate Results (Impact - Reliability)
