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UCC28180: How to design a PFC supply that is capable of peak powers 16 times higher than the system average power?

Part Number: UCC28180
Other Parts Discussed in Thread: UC2854B, UCC28070

How can I design a PFC supply that is capable of peak power 16 times higher than the average power without overengineering the solution with huge FETs and magnetics (40,000W 30mS against 2,500W rms)? The PFC stage this question refers to supplies a subsequent resonant converter that produces isolated DC power rails. It is perfectly allowable for these rails to collapse to half voltage during a high power surge. This is basically a question of where to put storage capacitors in a design and how to fool a control IC such that it allows itself to go out of regulation and does not switch off or self destruct the PFC (or resonant converter) power supply as its trying to recharge a storage capacitance that is half empty.

  • Hello Alex,

    This is quite a difficult design challenge but I think you can foresee some of the issues that will arise.

    There are two main requirements for rating an overload:

    (1) You need to know the duty cycle between the overload and normal operating load.
    This will set the maximum temperature and heatsink requirement for your system.
    The max junction temp of the semiconductors and the magnetics cannot be exceeded.

    (2) You can calculate the peak current in the power components and ensure that the bridge rectifier, boost FET and diode are capable of operating under these conditions. The calculator tool can be used for this.

    Also you should use the calculator tool to size the output capacitor.
    The output capacitor is calculated based on the minimum output voltage required during a holdup condition.
    So you could set the load as 40kW and calculate what the final value of Vout is after 30mS.

    The pfc will then go into current limit and the cap will supply your load current.

    Hopes this helps.

    Regards

    John

  • Hi John,

    Thermally I will monitor the system and reduce the power available as an average in order to keep this under safe limits. My plan has always been to allow the PFC output rails to collapse (discharging storage capacitance) under these excessively high loads hence after a while the collapsing rail effectively self regulates the current that can be drawn from it should the burst of power last longer than anticipated. I have no control over this duty cycle as its audio signals that are effectively drawing power from the power supply and it is generated by someone else beyond my control. Typically the burst length is the same a bass drum beat (under 30mS) and the repeat rate is that of the song's beat but there is no guarantee of that.

    I found it very hard to balance the onboard current limiting so that it allows the rails to collapse a little but without giving up and letting the supply collapse too far causing excessive ripple in the storage caps once the rail drops below the rectified mains voltage. This may be the action of the "soft limit" I don't know? And it was the reason I contacted Ti in the first place trying to understand how it works. I have been told it adds a resistor to the comp circuits (which is what it says in the data sheet) but not what effect that has on the current. How does the current change? instantly? slowly? per cycle? is there a soft knee? Without this information I have found it better to produce current limiting other ways and one quite effective one is to fool the controller by clamping the voltage feedback to stay above a minimum level. This makes it far less responsive and jumpy and provides more controllable rail collapse. The limiting current set up is effectively achieved by this in combination with the gain of the controller etc. (Empirical; not worked out with any maths). I've set the controller limit way up out of the way so it has no effect any more. This seems to work quite well now but it seems a shame that the onboard limiting can not be utilised because its function is not explained in enough detail that I can predict and control its response to heavy power transients.

    Another issue I have is time and in order to move forwards I will continue on the route that works for me as outlined above; but in the future I would be interested in revisiting this and trying to get the onboard limiter working again or possibly choosing a more suitable controller should there be something better available.

    Best Regards,

    Alex.

     

  • Hi Alex,

    The UCC28180 has a "soft" over current limit followed by a "hard" over current limit at a higher value.
    The soft over current adds a resistor to the error amplifier output and the effect of this is to lower the output voltage
    thereby protecting the output.
    At higher current limits the UCC28180 terminates the gate drive for the hard over current. This is also called the peak current limit.(PCL)

    You are hoping to design a system with a 14 times power capability so the soft over current limit is not relevant.

    All of the CCM type pfc controllers have a PCL type limit so you can consider using the UC2854B, UC3818A or UCC28070 controllers.
    The peak over current protects the boost inductor from saturating and this is highly important in a severe over current scenario.

    Regards

    John

  • Hi John,

    Can you tell me what the conditions are that mean the soft limit is unable to protect the circuit current thereby necessitating the second higher hard limit action to come into play? Is the soft limit much slower acting or does it have a soft knee compression type action rather then actually limiting to a fixed maximum current?

    Thanks for the heads up on the other controlers. At first sight they look to be a better bet as there are more points to access and monitor/modify the circuit etc. But I'll need more time to read up on the detail.

    Best Regards,

    Alex.

  • Alex,

    If you look at the parametric tables in the data sheet for the UCC28180 you will see that there current limits for the ISENSE input :

    Initially the controller limits the current when it measures -0.285V on ISENSE and this causes the output voltage to drop.
    As you say this has a soft knee and it really makes the controller think the system is in regulation by pretending that the output voltage is ok when in actual fact the output is below the steady state setpoint. It could be that the converter is slightly overloaded so there is no need to shut down the system.

    If the over current increases so that -0.4V is measured on ISENSE then the controller starts shutting off the PWM output.
    This is indicative of a  more severe situation. For example the output could be short circuited or the boost inductor has saturated..

    Those are the reasons behind the two types of current protection levels.

    Regards

    John 

  • Hi John,

    Thanks you, at last someone has been able to tell me how these limits function in a language I understand. May be I'll have another go at using them.

    Best Regards,

    Alex