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TPS659037: Power down sequence control using POWERHOLD pin

Part Number: TPS659037
Other Parts Discussed in Thread: AM5728,

Hi,

(I asked the same question to Processor forum, but they recommended to ask here.)

My customer is using TPS6590379 with Sitara AM5728.
He wants to trigger power down sequence by POWERHOLD pin.
- POWERHOLD pin is connected to AM5728 GPIO.
- BOOT1 pin is pull-down.

Customer wants to know which register configurations are needed on PMIC side.
According to datasheet(SLIS165G.pdf) section 5.4.2.2 OFF Requests, below two settings are needed.
- DEV_ON bit in DEV_CTRL Register is cleared to 0.
- Bit 5 in PRIMARY_SECONDARY_PAD2 Register is set to 1 to select secondary function (POWERHOLD).

Correct?

Thanks and regards,
Koichiro Tashiro

  • Tashiro-san,

    If the GPIO7 of TPS659037 is already configured as POWERHOLD (which by default it is), then pulling this pin low will automatically start the power down sequence. DEV_ON is a second off request option, but you only need one off request to turn the device off. Either one works.

    Thanks,

    Nastasha