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LM10506: LM10506 SPI timing

Terry Wu2
Expert 2110 points
Part Number: LM10506
Other Parts Discussed in Thread: , TPS652170, TPS65023B, TPS65218D0, LM10524

Hello Sir,

Is there LM10506 SPI timing spec could provide ?

We can't find it from D/S .  Many thanks !

  • 0
    TI__Mastermind 30280 points

    Terry,

    The LM10506 device is NRND. If you are still interested in using this device, I recommend you order a LM10506EVAL board and download the associated software for working with the EVM. 

    The SPI implementation is also shown in the LM10506 datasheet in Figure 23. SPI Interface Write on page 22 and Figure 24. SPI Interface Read on page 23.

    CS is active-low, CLK is inactive low, data is read on the rising edge of CLK, data is transferred MSB first, and the length of address/data is 8 bits. Any additional info you require should be provided by these timing diagrams.

  • 0 in reply to Brian Berner
    Expert 2110 points

    Hello Brian,

    Sorry that my description not clear enough ~

    We know SPI command format .

    And we need to know SPI timing ex: Rising/Falling time(us ) and max/min CLK frequency and its duty % .

    Many thanks ~

  • 0 in reply to Terry Wu2
    TI__Mastermind 30280 points

    I apologize, but if this information cannot be found in the datasheet then I also do not have access to the device requirements for SPI timing.

    The LM10506 is a legacy device targeted for SSD applications, and it is now NRND.

    There are many other PMICs available with similar performance (TPS65023B, TPS652170, TPS65218D0) but most of them use I2C communication, not SPI. As you know, I2C timing specs are more rigidly defined.

  • 0 in reply to Brian Berner
    Expert 2110 points

    Hello Brian,

    Thanks your reply !

    I check LM10524 also SPI interface but I still can't find SPI timing spec from D/S .

    This chip still active and may I get your help to confirm SPI timing spec ?

    Many thanks !

  • 0 in reply to Terry Wu2
    TI__Mastermind 30280 points

    Terry,

    I will not be able to locate the SPI Timing Requirements for the LM105xx devices in a short time period. However, below are some SPI Timing Requirements from another device with SPI interface that was released around the same time as LM105xx devices. The process should be similar, so the capabilities of the CMOS gates and drivers should be similar.

    Below is a diagram that shows the definition of these requirements.

    The following scope capture is from when I used the LM105xx GUI and SPI adapter to communicate with the device while I was testing a different issue (turning ON fPWM mode on all bucks).