Hello there,
I am currently working on the UCC28220q1 for interleaved boost converter. I wanted to know how the current sensing should be performed ? As if we use the current transformer, we don't get the DC offset. So what should be done in regarding this. Also, what is the range of control voltage pin, is it 0-3.3 or 0-3 ?
Thanks and Regards,
Akshay
Hello Akshay,
You can use a current transformer or a resistive current shunt on the source node of the FETs to sense the current.
The DC offset mentioned in the datasheet is an internal offset within the UCC28220 CS1 and CS2 pins.
This offset or level shift adds 0.5V to CS1 and CS2 so that the PWM comparator has 0.5V on the positive input with no signal on CS1 or CS2.
If you look at the block schematic in section 8.2 of the data sheet you can see this offset and also the 20kOhm, 30kOhms resistive divider on the error amplifier output.
This resistive divider means that the nominal voltage on CTRL where the PWM is zero will be 0.5+0.5 *20/30 = 0.83V
In actual practice the data sheet shows the value here has a much wider tolerance.
The CTRL voltage for 0% duty cycle is :
The maximum value for CTRL is equal to the REF voltage (3.3V)
Regards
John
Hi Akshay,
You can pull down SS pin to GND to disable UCC28220 when detecting the over-voltage of output.
Regards,
Teng
