TPS65381A-Q1: Keeping the MCU in RESET

Hi Pradeepa,

Below please find the answers to your questions.

A1) The watchdog (WD) on the TPS65381A-Q1 is highly configurable, including when it will cause NRES reset output pin to go low on a watchdog failure.  The WD can be configured for Q&A mode or trigger mode,  various Window 1 and Window 2 times which determine the time of a watchdog sequence and thus the time until ENDRV (safing output goes low) and time to RESET state transition when WD_RST_EN = 1 (cause the PMIC to transition to its RESET state which pulls NRES low resetting the MCU).  By default the PMIC re-initializes with WD_RST_EN bit cleared (=0).  Once you have configured the PMIC including the watchdog as you want and synchronized the MCU to the PMIC watchdog, run basic diagnostics on the watchdog you can enable a watchdog failure to cause a transition to the RESET state which pulls the NRES (and ENDRV) pin low by setting WD_RST_EN to 1.  How long the PMIC stays in this RESET state is configurable with a resistor to ground on the RSTEXT pin (examples 0 ohm give ~ 1.4ms reset extension or hold time and 22k ohm gives ~4.5 ms).  More details are in the datasheet.  There is a detailed FAQ on the watchdog on E2E plus other FAQ's which can be found on the E2E forum at this link.  

A2)  Unfortunately there is no direct way to read a register back an know what the reset cause was for this device since most of the registers clear when the fault is no longer present and some are re-initialized upon transition through RESET state.  You can however determine if the PMIC itself went through a power on reset at the PMIC level (lost power or transitioned through its STANDBY state).  Once the application has powered up and the software has configured the PMIC once, any configuration register that was changed for your specific application that has NPOR as the only re-initialization source will still have your specific configuration retained after a RESET state transition, but would be re-initialized to the default if a NPOR to the TPS65381A-Q1 occurred.  One example would be the WD_WIN1_CFG register, which is only re-initialized by NPOR.

Hi Pradeepa,

You are correct there is no way to have a reset from watchdog cause STANDBY state directly.  I was trying to think of a way to indirectly trap using the DEV_ERR_CNT but could not think of an indirect way to trap such an event either.