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TPS3823-33DBVTG4 , will it work with a 16 mhz signal

Pierre Tibblin
Intellectual 1310 points
Other Parts Discussed in Thread: UCC2946, TPS3813

We need to find a quick solution for this (read URGENT).

 

We want to use the TPS3823-33DBVTG4 watchdog chip  

The signal we have available on our current design to clock the WDI input is a 16MHz signal but this chip is only rated at 5Mhz (minimum pulse width of 100ns).

All we need to know is if the 16Mhz is clocking or not.  We were wondering if this chip TPS3823-33DBVTG4 can still do the job?  

Could the 16MHz to any damage inside the chip?

 

Does TI have a faster watchdog chip in a SOT23 package, or SC-70.

  • 0
    TI__Expert 8890 points

    Hi Pierre,

    The 16MHz clock will cause no damage to the Supervisor; but unfortunately, this part will simply not be able to recognise the wdi inputs at clocking speed above approximately 5MHz -Reset will be unpredictable.

    TI does not have a faster watch dog chip.

    Regards

    Bill

  • 0
    TI__Guru**** 150770 points

    The TPS3813 and UCC2946 only require 50 ns pulse width at the WDI.  The UCC2946 comes in an 8-pin SOIC.

    Will the TPS3813 work in your system?

  • 0 in reply to Chris Glaser
    TI__Intellectual 1310 points

    Here is the reply from the customer

     

    Pierre,

    Forget my last email.  If we use the 16MHz signal, 1.6 second should be fine.

     

    Since the 16MHz signal is a 50% duty cycle and it is always there compared to a usual watchdog signal which is a short pulse with much longer time between pulses, we were wondering if the internal logic of the TPS3823-33DBVTG4 would still detect some edges of the 16MHz signal and prevent the watchdog timer to timeout if this signal is present.

  • 0 in reply to Pierre Tibblin
    TI__Expert 8890 points

     

    The internal logic may not detect the WDI at all  - which then causes a false RESET/ .  But then,  if the supervisor then detects the WDI during this false RESET/ , this will cause RESET/ to be extended beyond the normal time delay.  In other words, the RESET/ signal becomes undependable or even unstable.