Other Parts Discussed in Thread: UC3823
Hi TI team
I'd like to know output A & B of UC3825.
Are they reverse each other, or phase difference angle??
Thanks
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Hello Chen
The two outputs are the same but there is a 180 degree phase shift between them. The design example on P8 of the data sheet shows the controller being used to control a push-pull power stage.
Regards
Colin
Hi Colin
Thank you for your answer.
The duty cycle of each output is 49% (< 50%).
I don't know could this IC work on CCM.
Andy
Hi Chung,
If you combine the A&B gates there will be some deadtime between the gate drive pulses even at maximum duty cycle. A finite amount of time is required to reset the timing ramp internally and this results in a maximum duty cycle of less that 50% or 100% in practice.
Regards
Peter
Note that 50% duty cycle applied to each channel A or B. Not both A and B.
I used UC3825 for push-pull where duty cycle actually goes to 95% depending on slope compensation adjustment. Datasheet may need to clarify this meaning.
I have not used UC3823 (which quoted100%) so I cannot comment.
R.
回复彼得·梅尼
Hi Peter
I used UC3825 for push-pull where duty cycle actually goes to 95%.
Does it mean the duty of A & B is 95%/2?
Thanks
Hi Payne
Yes, that correct.
Reply to the duty of A & B is 95%/2?
When duty goes to 95%.
How many of the switching frequency is it?
Thanks
Hi Chung,
Page 6 of the datasheet shows the deadtime and how the deadtime varies with the value for the Ct, timing capacitor. The deadtime is the time take to discharge the timing capacitor at the oscillator period. The deadtime reduces the maximum duty cycle available.
The A and B outputs operate at 50% duty cycle in theory, this will be reduced by the deadtime which depends on the Ct value. What value of Ct and Rt do you expect to use?
Regards
Peter