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LMZ31710: What is INHIBIT Mode exactly?

Part Number: LMZ31710

Hello

I had a question about the INHIBIT Mode.  Can anyone tell me if this device is supposed to drive the VOUT pins LOW when its in INHIBIT MODE?

I have been trying to determine the current draw of our FPGA on the LMZ31710.  But because we have the local LMZ31710 directly connected to the plane on this DUT card, we decided to put the local LMZ31710 in INHIBIT Mode and use a secondary card with its LMZ31710 as the source.  We are sort of parallel connecting these 2 devices just without out any RTClk/SyncOut connections.  What I have noticed is that the SOURCE LMZ31710 is not operating at the desired output level even when the target FPGA is not programmed.  Its almost like the INHIBIT mode of the local LMZ31710 is actually driving its VOUT pins to zero.  Its essentially fighting the source LMZ31710.

Is this how the INHIBIT Mode works?  Is it supposed to drive its output pins low instead of creating a HI impedance?

Any thoughts?

Thanks

Layne

 

  • Hi Layne,

    What is PVIN of the disabled LMZ31710 connected to when you apply this secondary LMZ31710 at the output?

    Although Inhibit disables the part (FETs not switching),  there can be a path from the output back to PVIN through the internal highside FET body diode.

    You can refer to this other related thread which also links to a blog for more information:

    Regards,

    Kris