TPS82150: unregulated input

Giovanni,

The TPS82150 can operate from a full-wave bridge rectified AC source given several restrictions:

1) The peak voltage of the AC source after rectification at max line voltage, must be less than or equal to 17V.

2) The minimum peak voltage of the AC source after rectification a min line voltage, should be greater than 6V

You will need sufficient CIn hold-up capacitance that the valley voltage post rectification does not fall below 5.5V to maintain a 5V output or 4.0V to maintain a 3.3V output.

The amount of Cin required will depend significantly on the value of minimum AC line, and depending on the tolerance of the AC source, it might not be possible to operate between 6V and 17V peak.

A quick, but over estimation, of the amount of capacitance needed is Output Power (Vout * Iout) divided by efficiency (about 0.9) to get Input Power.  Divide Input Power by the minimum Vin voltage to the TPS82150 to get the VIN load current.

The Cin input capacitors need to deliver that much load current for 1/ 120 Hz = 8.33ms without allowing the rectified voltage to drop below 5.5V or 4.0V.

Based on a direct transformer conversion from 120RMS +6/-12 AC source, the peak line voltage is 180V, a fixed transform would need to have a 10.5:1 turns ratio to keep the resulting secondary side voltage below 17V peak.  At low line, that provides a peak voltage of 14.9V.  Dropping upto 1.4V across the full wave bridge rectifier provides a minimum rectified input voltage of 13.5V.  Cin would be sized to provide a minimum drop of 8V while the rectified line voltage drops from 13.5V (peak) until it is rising back to 5.5V (6.9V at the output winding or  72.45V at the AC input (48.5% of peak)

The inverse SIN of 0.485 is 29 degrees, so the delay from Peak to the voltage recovering to 48.5% of peak is 119 degrees or 5.5ms at 60Hz.

The Input Capacitor will have to source 5W of power at about 90% efficiency for 5.5ms with a voltage drop from 13.5V to 5.5V.

5W / 0.9 * 5.5ms = 30.55mJ.

The energy stored in a capacitor is 1/2 C * V^2, the energy recovered from a capacitor discharged from 13.5V to 5.5V is 76 J/F or 402uF

Be careful of the ESR of that capacitor, the above equations did not account for any energy loss on the ESR, which will be carrying close to 1A of current during that 5.5ms.

If we change the turns ration from 10.5:1 to 12:1 (Nominal 10V AC) the peak voltage will drop from 14.9V to 12.4V at the transformer and 11V after the bridge.  With a lower peak voltage, the capacitor needs to hold up the converter input voltage for 5.73ms for 31.8J of energy, and the 11V to 5.5V storage capacity is 45.3J/F, increasing the required hold up capacitance to 700uF (still ignoring ESR losses).

If the line voltage can rise above 128Vrms (120Vrms + 6%) a higher turns ratio may be required, requiring more output capacitance.

If the line voltage can drop below 105Vrms (120Vrms - 12%) a lower initial charge voltage would be forced, requiring more output capacitance.

If the Max AC line to Min AC line ratio is more than 2x, it may not be possible to find a fixed turns ratio that prevents peak recifited voltage less than 17V and holds the valley voltage on CIN greater than 5.5V.