I have 12 V supply and need for a 0.9V out from Ch1 at nearly maximum current.
Also sw freq needs to be high in order to contain ripple with a limited tank capacitance (about 300 uF).
I
-calculated that with a direct 12->0.9 V jump i'd have to face big losses, ripple and would hit the ch1 peack current threshold too early.
Best would be jumping from 12 to 5V (this is already done in a weakly loaded ch2 of same chip) then from 5 to 0.9V. This would allow for as high as 1.5Mhz freq, Tpulse min constraint respected, while maximizing current output on 0.9V rail.
In order for ch1 to start only after ch2 (5V) is already regulating, i put a 1uF Cap on EN1 pin.
But so arranged the chip does not start: no voltage develops on LDO output, therefore inhibiting startup.
This seems strange to me: i guess the LDO should be started even with just one channel enabled, should'nt it?
Any hint/idea welcome!!
Francesco
