Hi TI Team,
About TPS543B20 boostrap resistor value, TI recommends 0 ~ 10Ω.
Our design uses 22Ω + 0.1uF, to reduce spike.
Is there is any concern about the operation with this value?
Best Regards
Naim
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Hi TI Team,
About TPS543B20 boostrap resistor value, TI recommends 0 ~ 10Ω.
Our design uses 22Ω + 0.1uF, to reduce spike.
Is there is any concern about the operation with this value?
Best Regards
Naim
Hi Naim,
If the boot resistor is too large, the boot capacitor may not get fully charged in each cycle as mentioned in this app note.
I would recommend staying within the 10ohm recommendation and would recommend you consider trying other approaches to additionally mitigate ringing as described in the above app note.
I will see if I can dig up more information for this device specifically on the Rboot limits, but for now recommend staying within the listed recommended range.
Regards,
Kris
Hi Kris, thanks for the reply.
Additional information on the design.
Vin = 5V
Vout = 0.72V
Fsw = 880kHz
Iout max = 12A
I took the waveform at SW and BOOT pin. Red colour math function is the substraction of CH1 and CH2.
Sorry for bad resolution but it seems like the charging is complete before next cycle start.
May I know your opinion on this condition?
Best Regards
Naim
I think that looks fine, but I would recommend you test your design over for the full expected input voltage range (different duty cycle), load range, and temperature range you expect in your system to make sure you see good switching behavior.
Hi Kris,
Thanks for reply.
Does the high side FET has UVLO protection?
May I know the drive voltage?
Best Regards
Naim
We usually indicate on the datasheet functional block diagram whether the high side FET driver/boot has UVLO, for example, in the TPS54424 block diagram). There is no boot UVLO indicated in the block diagram on p.13 of the TPS543B20 datasheet.
The boot voltage and high side FET driver voltage is derived from the BP LDO 5V output minus the 0.1-0.2V boot switch drop. BP does have a UVLO of 3.11V (see p.10), but this does not translate directly to UVLO protection on the floating boot high side FET driver.