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ISO5852S: desaturation inactive higher than 1V

Part Number: ISO5852S

Hello team,

We have problems with faulty desat trips.

we see standard a pulse on desat (somewhere in our sine modulation) as high as 10V

first picture Gate signal with desat pin voltage.

 

We have two picture with the measurement of the voltage between V221 and R226 first without a jumper on X220 and one with a jumper on X220

It looks like the ISO5852s can't handle the current from the circuitry

P.S. the pin numbering in the schematic are from the ADUM4135 we have replaced it with TI and swap R-ON and R-OFF

  • Hello Harrie,

    At first glance it seems that there may be some reverse current due to the IGBT or MOSFET turning off that is causing the capacitor to charge to above the threshold voltage. One possibility would be to increase R226 to 1 kOhm. What is your target voltage threshold for DESAT detection and your desired blanking time? Is is also necessary to use R222?

    Does the DESAT show normal voltage waveform during turn on? Could you share that waveform? 

    Regards,

    Audrey

  • Hi Harrie,

    In any case, the output is not affected since the driver is turned off. You also should not be seeing the nFLT pin because the driver input is low. Is that correct?

    Regards,

    Audrey 

  • Hello Audrey,

    Our proto inverter is with SiC mosfet. 
    {700 V DC, 40 kHz, sine-filter}

    The target threshold is now 3.5 V 10 us (R222 is necessary @ 220pF)

    We started this measurement because after 30 minutes at 80 kW we get a Fault signal from the TI-driver.
    the SiC-mosfet temperature of that phase was ca. 50 C. Our electronics above the SiC-mosfet was in free air (21 C).

    We did the measurement at 0 kW (sine-filter connected) and a "cold" system and we did not have a Fault signal at that moment.

    Best regards,

    Harrie

  • Hello Audrey,

    waveform turn off / turn on.  I don't see any problem in turn on, only the desat-unload-capacitor mosfet can do some more current at the start of the pulse?

    I have this picture also in excel measurement (500MSa/s)

    Regards Harrie

  • Hi Harrie,

    Thanks. I see how you have come out with 3.5V DESAT threshold voltage based on your schematic. However, a 10 us blanking time seems much longer than what you would actually get, which is more like sub 2 us blanking time with 220pF cap. But since you are using SiC, then I would expect a sub 2 us blanking time is acceptable given the fast turn-off speed.

    Thanks for sharing the additional waveforms. It seems to be an issue then with the high positive dv/dt of the SiC MOSFET during turn-off. If possible, could you try increasing R226 to 1 kOhm to see if there is any improvement?

    Do you have a way to measure the current at the DESAT pin during this transient?

    Regards,

    Audrey

  • Hi Harrie,

    Just wanted to check on this thread. Has your circuit's performance improved? If so, please click the green button to let us know it is resolved.

    Regards,

    Audrey

  • Hello Audrey,
    after some struggling I have measurements (not from current).
    I did the measurement  with 100E and with 820E, extra measurement channel 1 U drain-source.
    picture 1: 100E trigger on high Desat signal.

    picture 2 100E lower Desat signal

    Picture 3 820E try to trigger on highest desat signal (when turned off)

    picture 4 820E On-Off puls

    The high Desat pulse is gone.

    To understand the measurements is it the high impedance of the desat fet in the ISO5852 with the high dU/dt peak the problem of the signal? and is the ISO5852 blocked for desat fault trips when Gate signal is low?

    There will be one challenge left for us and that is to speed up the desat trip time.

    We think the R222 must be changed from 10k to 1 k, can You give me some feedback for the two questions and this last statement.

    regards Harrie.

  • Hi Harrie,

    Good to see the high voltage spike suppressed.

    The internal FET that pulls the DESAT pin low while IN+ is pulled low is only allowed to sink so much current. My thought is the current which flows back to the pin is partially sunk by the DESAT internal pulldown FET while the rest charges up the blanking capacitor. The Fault will not trigger unless IN+ is pulled high. And since this occurs during turn-off, then the fault will not trigger.

    Based on your circuit then you are looking at a 2.8V threshold and 285ns blanking time (when R222 is 10k). If you were to reduce R222 to 1kOhm then you'd be looking at about 36ns. 

    Depending on your target timing, maybe you could try out a 5kOhm resistor at R222 (~160ns blanking time) to allow more time for the FET to turn on while still shortening the blanking time for fast protection.

    Regards,

    Audrey