Hello team,
my customer started working on the EVM of the LM5085.
Unfortunately we find discrepancies between what the simulator says and the formulas to be applied, could you help us solve this problem?
Following snap is suggested from the SW/Tool:
Whereas the following is a snap from what is mounted on the EVM as suggested:
From the software, I have serious doubts about choice D1:
"The diode must be rated for the maximum input voltage, and the worst case current limit level"
Despite an increase in Rsns to reduce scissors, the current limitation is 3.4A-5.8A, hence a 6A 80V shottky.
"The diode must be rated for the maximum input voltage, and the worst case current limit level"
Despite an increase in Rsns to reduce scissors, the current limitation is 3.4A-5.8A, hence a 6A 80V shottky.
Given that in order not to be bound to a topology and number of capacitors and to be able to distribute them on the board for example, the layout with Rr, Cr, Cac is required to generate a minimum ripple for the operation of the IC.
The simulator is in complete contrast with what is stated by the datasheet, for example:
The simulator is in complete contrast with what is stated by the datasheet, for example:
"C2 (Cac) is then chosen large compared to C1, typically 0.1µF. "
It is not clear how to calculate the 3 components using the datasheet formulas, example:
It does not take into account the way we use it with Vin even below the nominal.
Following are the MOds to the EVM:
R5 20mR
R3 2.4k
R4 390k
R2 549R
L1 33uH saturazione > 5.8A
R7 26.7k
C9 3.3nF
C10 33nF
C6 C7 generici 100uF 105° 50V low esr
Could you please help us to clarify this situation?
Thank you in advance for your support.
Best regards,
Adrian
