Hi,
If the PMIC is reset by (WD_FAIL_CNT=7+1 & WD_RST_EN=1), will WD_RST_EN reset to the default value 0? If it stays in 1, is there any way to keep PMIC in diag state without any register write and WD(In this case the MCU is still not working so it cannot configure the PMIC, so I asked this question)?
Does the SPI of MCU reset trigger the PMIC reset? I think no, but please help confirm.
Thank you very much!
Hi Wayne,
Please see the answers to your questions.
Q1: If the PMIC is reset by (WD_FAIL_CNT=7+1 & WD_RST_EN=1), will WD_RST_EN reset to the default value 0?
A1: As outlined in the section 5.5.4.11 SAFETY_FUNC_CFG Register descriptions in the datasheet and highlighted below, the initialization source for this register is only NPOR (power on reset to the PMIC). Thus, if the application has set the WD_RST_EN bit in the PMIC, it will remain set unless it is cleared during DIAGNOSTIC state or the PMIC has a NPOR event (such as powering down to STANDBY state or another NPOR event).
Q2: If it stays in 1, is there any way to keep PMIC in diag state without any register write and WD(In this case the MCU is still not working so it cannot configure the PMIC, so I asked this question)?
A2: If the PMIC only transitions through RESET state due to a watchdog failure (or other event) the WD_RST_EN will remain set to 1. The only way it will be cleared is the MCU clears this bit during DIAGNOSTIC state or the device transitions to STANDBY state or other NPOR.
Q3: Does the SPI of MCU reset trigger the PMIC reset? I think no, but please help confirm.
A3: I do not understand this question, but will offer two points which may answer your intended questions. If you meant can the MCU send a SPI command to reset the PMIC the answer is no, not directly. If Q&A watchdog mode is being used, if the MCU stops sending the WD answer bytes, or intentionally sends wrong answer bytes or the answer bytes too quickly via SPI while WD_RST_EN = 1 then indirectly the MCU can cause RESET state via SPI.
