• State TI Thinks Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 63 subscribers
  • Views 447 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TLC6C5912-Q1: Drain-to-Source parasitic capacitance of output FET

RYO
Intellectual 2000 points
Part Number: TLC6C5912-Q1

Hi all,

Can you tell me the drain-to-source parasitic capacitance of output FET when the FET is off or the TLC6C5912-Q1 is disabled as below?

Thank you,
RYO

  • 0
    TI__Genius 15776 points

    Hi

    Why you care about the parasitic cap.i think it's nf level.

  • 0 in reply to Frank Qiu
    TI__Intellectual 2000 points

    Hi Frank,

    I need this data because LED may be on very short time when battery is connected. The current flowing from the battery to this IC OUT pin to charge the parasitic cap. Due to this current, the LED connected to this IC may turns on.

    Regards,
    RYO

  • 0 in reply to RYO
    TI__Genius 15776 points

    Hi RYO,

    As you say, the equal circuit shoud be as below during start up.The charge time t=Vin*C/Iave(ignore the min vf of LED), where Vin is supply voltage , C is Cds as you say and Iave is the average value of this charge current.We can approximate Iave=Imax/2,and Imax=Vin/R(R is the resistor seriers in output channel), so we can get t=2*C*R.C is nf level and R is kohm level so t is us level.As the visiable range is below 60Hz, so we can regard the min time tv that we can see the LED light is ms level.

    So t<<tv, this parasitic cap wouldn't tigger fault light during battery is connected.