Hi all,
Can you tell me the drain-to-source parasitic capacitance of output FET when the FET is off or the TLC6C5912-Q1 is disabled as below?
Thank you,
RYO
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Hi all,
Can you tell me the drain-to-source parasitic capacitance of output FET when the FET is off or the TLC6C5912-Q1 is disabled as below?
Thank you,
RYO
Hi Frank,
I need this data because LED may be on very short time when battery is connected. The current flowing from the battery to this IC OUT pin to charge the parasitic cap. Due to this current, the LED connected to this IC may turns on.
Regards,
RYO
Hi RYO,
As you say, the equal circuit shoud be as below during start up.The charge time t=Vin*C/Iave(ignore the min vf of LED), where Vin is supply voltage , C is Cds as you say and Iave is the average value of this charge current.We can approximate Iave=Imax/2,and Imax=Vin/R(R is the resistor seriers in output channel), so we can get t=2*C*R.C is nf level and R is kohm level so t is us level.As the visiable range is below 60Hz, so we can regard the min time tv that we can see the LED light is ms level.
So t<<tv, this parasitic cap wouldn't tigger fault light during battery is connected.