• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Answers 1 answer
  • Subscribers 63 subscribers
  • Views 621 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TL2845: junction temperature and ambient temperature

Howard Zou
Genius 12365 points
Part Number: TL2845

Hi,

in TL2845 datasheet, we have "Operating free-air temperature" in recommended operating conditions.

And we have "Virtual junction temperature" in absolute maximum ratings.

My customer would like to know if it's okay to operate the device beyond "Operating free-air temperature" 85C and keep junction temperature below "Virtual junction temperature" 150C.

And how can we calculate junction temperature with ambient temperature. 

We have offered "Junction-to-ambient thermal resistance" without specify the conditions, but this parameter should be a PCB dependent parameter.

  • 0
    TI__Mastermind 34465 points

    Hello Howard,

    The thermal information written in the data sheet is not very well explained or documented.

    But the the so called "operating free air temperature "  is detailed in section 6.3 of the data sheet

    This is the temperature range where the device parameters in the parametric tables are measured.

    The so called "virtual junction temperature "  is 150C and this is the absolute maximum junction temperature for this part.

    So the answer to your first question is yes.
    You can operate the TL284x above 85C and below 150C.
    There will be a degradation in parametric values at this elevated temperature but the part will still function and be destroyed.

    An explanation of how the thermal resistance and junction temperature is described in the document attached.
    This document is also referenced in Note 1 of the Thermal Information section 6.4 of the data sheet6557.spra953c.pdf

    Regards

    John

  • 0 in reply to John Griffin1
    TI__Genius 12365 points

    1. There will be a degradation in parametric values at this elevated temperature but the part will still function and be destroyed. Do you mean won't be destroyed?

    2. This is the temperature range where the device parameters in the parametric tables are measured.

    My question would be: what's the PCB layout when we test the device parameters? For example, if the PCB layout on customer's board is different from(worse than) the PCB we test the device parameters, the device parameters may also degrade even if we keep the ambient temperature below 85C, right?

  • 0 in reply to Howard Zou
    TI__Mastermind 34465 points

    1 There was a typo in my reply. The part will recover.

    2 The temperature range is detailed in the data sheet and in my initial response above and below:

    And the pcb layout used for the measurement of thermal resistance is detailed  the SPRA953C pdf document.

    The ambient temperature is used together with the power dissipation in the package to calculate the junction temperature.

    The junction temperature needs to be maintained within the limits shown above

  • 0 in reply to John Griffin1
    TI__Genius 12365 points

    John,

    thanks. I've read the article you provided.

    Within the JEDEC specification, two test board types are allowed. A 1s (single signal layer) configuration
    gives a typical usage value for a moderately populated, multi-plane system-level PCB application. A 2s2p
    (double signal layer, double buried power plane) configuration gives a best case performance estimate
    assuming a sparsely populated, high-trace-density board design with buried power and ground planes.

    So I guess 1s configuration is used when giving RθJA in the datasheet, right?

    But what's 1s configuration? What's the thickness of the copper, and is the copper size the same as the device's package size?

  • 0 in reply to Howard Zou
    TI__Mastermind 34465 points

    Howard,

    Section 1 of the TI document says that this process is specified by JEDEC in the EIA/JESD51-x series of documents.

    I do not have access to these standards so I cannot answer your questions in any more detail.

    Perhaps you should close this post and open a new post requesting detail on how thermal resistance is measured for the SOIC 14 pin and 8 pin as well as the PDIP 8 pin packages.

    Regards

    John