BQ40Z80: Default level when pin20 is active

changhe wen

Part Number: BQ40Z80

We know that pin20 is an exception，So when pin20 is used as PDSG and the device decides to turn on pre-discharge PFET, what is the default output level? Can this level be set in studio?

over 5 years ago

0 Steven Yao over 5 years ago

TI__Genius 12215 points

Hi, Changhe

I think this is controlled by the bit PDSG in FET Options register in data flash, you can verify if this works with the EVM on hand

0 changhe wen over 5 years ago in reply to Steven Yao

Prodigy 150 points

Steven Yao said:

Hi, Changhe

I think this is controlled by the bit PDSG in FET Options register in data flash, you can verify if this works with the EVM on hand

You gave me an irrelevant answer,If there is no clear answer, can you ask other colleagues to answer my questions? I've wasted two posts on this issue.

0 Damian Lewis over 5 years ago

TI__Mastermind 34775 points

Hello Changhe,

When pin 20 is used for PDSG, it's active low once the polarity is configured as mentioned in the Technical Reference Manual (TRM) which you have mentioned in previous posts. When configured properly pin 20 is open drain, so in PDSG OFF state pin 20 will be pulled high by the PFET gate to source resistor. When PDSG ON pin 20 will be pulled low by the gauge.

0 changhe wen over 5 years ago in reply to Damian Lewis

Prodigy 150 points

Hi Damian,

Thank you very much for your answer.

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BQ40Z80: Default level when pin20 is active