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VMODE & nSLEEP,CLKREQ Pins Selection

I have a doubt regarding the VMODE (1,2) pins. Is this purely related with hardware control are with Software. As for my understanding,

1. we need to set the respective voltage level(by enabling VMODE) for VDD1 core supply using VROOF & VFLOOR registers.

2. If we go for this there is no need to do anything via software. i.e whenever it is necessary to make the system to SLEEP or ACTIVE mode we need to change the pin state.

3. Is this is the case, what is the real need of nSLEEP1,2 & CLKREQ pins. If it is related to VMODE, what sequence we should follow for this VMODE operation.

  • For 1 and 2:

    VMODE is a software control. You will have to enable this function in software (ENABLE_VMODE). If you change the VMODE pin state then the voltage will change between VFLOOR and VROOF. This is not the same as SLEEP and ACTIVE states.

    VMODE is not related to nSLEEPx and CLKREQ. If you read the documentation you will see that there are three processor groups that can be defined. Each power resource (DCDC and LDO) can be associated to any processor group and can be controlled using the control signals.

    Example:

    Say, VDD1, VAUX1 are part of processor group 1. This can be done by setting the DEV_GRP bits in respective registers.

    VDD2, VSIM are part of processor group 2.

    VAUX2, VDAC are part of processor group 3.

    If you have programmed the correct sequence in the device memory then if nSLEEP1 goes low you will have VDD1, VAUX1 in sleep state (meaning low power consumption). Similarly, if nSLEEP2 is low then VDD2 and VSIM are in sleep state and when CLKREQ is low then VAUX2 and VDAC are in sleep state. Please see corresponding sequences in Sleeo 2 Active and Active 2 Sleep tables in TRM.

    As said earlier, section 5.4 in the TRM does show the sequences and behavior. I agree it is a little difficult to understand as this is a complex power management device with lot of configurable options.