TPS3840-Q1: ABOUT MIN RESET TIME DELAY

Koji,

The minimum and maximum Reset time delay when using a capacitor can be calculated using equation 5 and 6 in the datasheet and using R_CT minimum and maximum values.

We do not provide a minimum or maximum for reset time delay when not using a capacitor because we do not test these limits, only the maximum value. We do have data that suggest ~6 us typical and ~5 us minimum on the reset time delay without a capacitor but these values are not guaranteed. Please note the reset time delay with no capacitor can vary depending on board layout and parasitic capacitance on the CT trace. Please let me know if you have any additional questions. Thanks!

Koji-san,

tD (no cap, min) is not a spec we guarantee and depends on the layout and parasitic capacitance of the pin trace. A ~5 us estimation for tD(no cap, min) is a safe estimate based on data we have.

Please let me know if you have any other questions. Thanks!

Koji-san,

I apologize for the confusion. tD MAX is 50us when the CT pin is open. The minimum programmable reset time delay configuration is with no capacitor (CT is floating) and is 50us max. The value is 50us max, but the configuration (no capacitor) is the minimum delay configuration. We do not guarantee the minimum value with no capacitor, but we estimate the minimum reset delay with no capacitor is ~5us. So please note 7.6 table describes the no capacitor reset delay value as 50 us MAX, and 8.3.2 describes the minimum reset delay configuration = no capacitor = 50 us MAX. Adding a capacitor increases the delay from the minimum configuration of no capacitor. As previously mentioned, the minimum reset delay value with no capacitor depends on the layout and operating conditions, but we estimate ~5us minimum.

Please let me know if this is understood.