Hi team,
Does TPS51206 support the following DDR3 regulation?
- When VDDQ is <500mV, VREFCA must be <= 300mV.
Regards,
Itoh
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Hi team,
Does TPS51206 support the following DDR3 regulation?
- When VDDQ is <500mV, VREFCA must be <= 300mV.
Regards,
Itoh
Hi Qian-san,
Thanks.
This question is about start-up / shut-down transient. VDDQ is constant 1.5V.
Regards,
Itoh
Itoh-san,
VTTREF will track VDDQ/2.
When VDDQ is <500mV, VREFCA will be < 250mV.
Thanks
Qian