CSD22206W: Idss at -4VDS, Igss at -4VGS

Hi Imi-san,

Thanks for promoting TI FETs at your customer. This is the same response I provided for your other e2e post. Please feel free to contact me at my TI email address if you wish to discuss further.

We do not test or spec drain-source and gate-source leakage currents under those conditions. Therefore, I have no data to share. During product development, we collect IGSS and IDSS data for a number of samples under the conditions specified in the datasheet: IGSS is measured at 25C with VDS = 0V & VGS = -6V. IDSS is measured at 25C with VGS = 0V and VDS = -6.4V. In general, this data shows that both IGSS and IDSS are both well below the -100nA limit. However, we can only guarantee the limit in the datasheet (-100nA). Also, both IGSS and IDSS have a positive temperature coefficient meaning the magnitude of leakage current increases with increasing temperature. The effect is much stronger on IDSS as this is a p-n junction and not so much for IGSS as this is the gate oxide barrier.

From what I have read, VDS has a very small effect on IDSS and VGS also has a very small effect on IGSS. Can you tell me more about the application? Why is the customer concerned with IGSS and IDSS at -4V for VDS and VGS?

Hello Imi-san,

Following up to see if you have any additional questions. I will assume that this adequately answered your questions if I don't hear back in the next day.

Thank you for your answer. The background of this question is 1uA(max) IDSS is high not enough to accept his application, and he expected IDSS become lower in his actual application of VDS=4V.

Do I understand IDSS is reverse bias saturation current, so that this number is increased depending on the transistor size, lower the RDSon, higher the IDSS.

best regards,

Thank you for your information.

Could you please share the CSD22206W, CSD22205L  IDSS evaluation or distribution data over the temperature with our customer for the reference.

best regards,