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TPS65950: Smart Reflex

I found that we can enable smart reflex method by enabling SMARTREFEX_ENABLE bit in DC/DC_GLOBAL_CFG[3] register. I found two such registers with same address but with different Instance POWERPM_RECEIVER & PM_RECEIVER. What does it mean? Do we need to use the dedicated I2C for enabling this smartreflex SP-I2C or the general I2C GP-I2C for this? [In my system hardware i have connected I2C2 as GP-I2C & I2C4 as SP-I2C].

Can we do power management using smart reflex for VDD2 also?

Is that dedicated I2C (I2C4 in OMAP) is used only for smart reflex?

can we use the smart reflex & voltage control mode( for controlling other supplies) together?

  • I found that we can enable smart reflex method by enabling SMARTREFEX_ENABLE bit in DC/DC_GLOBAL_CFG[3] register. I found two such registers with same address but with different Instance POWERPM_RECEIVER & PM_RECEIVER. What does it mean?

    [GD] PM_RECEIVER is just a way to separate registers based on some classes mentioned in the database tools used. You can see different instances used for different registers. In this case there would have been a problem with the extraction/filtering from the database tool. I would not look at this field at all as it is not really necessary from software programming perspective. I would give importance to the physical address.


    Do we need to use the dedicated I2C for enabling this smartreflex SP-I2C or the general I2C GP-I2C for this? [In my system hardware i have connected I2C2 as GP-I2C & I2C4 as SP-I2C].
    [GD] I2C4 is used for smart reflex control.


    Can we do power management using smart reflex for VDD2 also?
    [GD] Yes


    Is that dedicated I2C (I2C4 in OMAP) is used only for smart reflex?
    [GD] Yes, you can double check with OMAP support.


    can we use the smart reflex & voltage control mode( for controlling other supplies) together?
    [GD] SR is used only for the two core supplies, VDD1 and VDD2. I didnt understand the question, if this is not clear then please rephrase your question.

  • Do we need to use the dedicated I2C for enabling this smartreflex SP-I2C or the general I2C GP-I2C for this? [In my system hardware i have connected I2C2 as GP-I2C & I2C4 as SP-I2C].
    I2C4 is used for smart reflex control.
     How to enable the SMARTREFLEX_ENABLE bit in the DC/DC_GLOBAL_CFG register. As mentioend above, I2C4 is used for smart reflex control, can we use the same I2C4 itself to access this register & enable this bit. In clear phrase, does the TPS & OMAP supports this I2C4 communication only if we configure both the system in smart reflex control or we can do normal I2C communication through this & enable this bit.?

     

    can we use the smart reflex & voltage control mode( for controlling other supplies) together?
    SR is used only for the two core supplies, VDD1 and VDD2. I didnt understand the question, if this is not clear then please rephrase your question.

    In my system I am using the LDO's - VIO.OUT, VAUX4.OUT, VMMC1.OUT, VPLL1,2,VDAC.OUT, VSIM also. My system comprises of OFF, SLEEP, ACTIVE modes( in ACTIVE Mode i have 6 different supply requirements). During SLEEP mode I need to keep the VDD1 and rest of the LDO supplies in SLEEP state & VDD2 alone in ACTIVE state.

    So is there any possibility to control the supplies VIO.OUT, VAUX4.OUT, VMMC1.OUT, VPLL1,2,VDAC.OUT, VSIM using voltage control mode & VDD1 using smart reflex?

  • SR registers in TPS are controlled by SR commands from OMAP. I2C4 is dedicated to SR control and hence you should use this when configuring levels for SR control. For normal I2C communication you should use the other I2C interface (GP) on TPS and any other I2C on OMAP excluding I2C4.

    Smart reflex is a hardware control mechanism and not software control. I am guessing you are asking about software control. So, I doubt if you want to use the hardware control for VDD1. You may ask more questions about SR control to OMAP team.

    If you want only VDD2 to be always active and the rest of the resources in SLEEP mode then you can configure VDD2_REMAP register accordingly.