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Hello,
I have one doubt regarding the dead-time pin functionality of UCC21520/UCC21530. When the pin is left open, the dead-time is set to <15ns.
It is not clear from the datasheet if overlap protection is active or not in this case.
Looking to the board manual, this is also not clear since for this situation the 2 PWMs shown are complementary switching.
Checking the other datasheets for confirmation, I found out that in the 150mil DSO UCC21522 there is the following statement:
"Tying DT to VCCI or leaving DT open allows the outputs to overlap."
For DTC left open, the overlap protection seems to be deactivated for UCC21522. What about the other drivers in 300mil DSO and LGA (as UCC5120 in 300mil DSO and LGA options)?
Is the approach different between packages?
Best regards,
Luca
Hi Luca,
Thank you for your question. I work on the applications team in the high power drivers group.
If the DT pin on UCC21520 is left open it will not allow output overlap. This is outlined in the Input and Output Logic Table in section 8.3.2.
As for your question regarding UCC21522, I believe you were refering to UCC21222 as we do not have a part with the number UCC21522. You are right that UCC21222 does not have overlap protection when DT is left open. This difference comes down to UCC21520 and UCC21222 being in different product families.
I would recommend that you don't leave the DT pin floating. Either tie it to GND with Rdt and Cdt for increased noise immunity or to VCCI to deactivate it.
If this answered your question, could you please press the green button? If not, feel free to ask more questions.
Thank you and best regards,
Zachary