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Original question:

BQ76930EVM: Configuring EVM with a 7s Pack for Evaluation

BQ76930: BQ76930 + BQ78350-Q1 for 7S4P Battery cells

Henry Wang
Intellectual 700 points
Part Number: BQ76930

Hi Team,

My client would like to design a BMS to use the BQ76930 and BQ78350-Q1 for 7S4P Battery cells (18650 battery) with 5A charging.

Would you please help to review the below schematics and give some advice? Thanks!

7S4P battery cells.pdf

  • 0
    TI__Guru 54715 points

    Hi Henry,

    You might see the video on schematic creation: https://training.ti.com/how-create-schematic-bq76920-bq76930-and-bq76940 

    Some observations:

    • The schematic looks a bit like the EVM, and it may be desired to provide a board design which could work for several cell counts which might be done with selected components see comments below.
    • To reduce the cell count to 7 cells it is preferred to short the pins at the IC.  So install the zero ohm resistors from R63, R62, and R64 at C32, C31, and C26.
    • The 1k and 1uF Rc and Cc can show voltage artifacts when balancing.  Consider using 0.22 or 0.1 uF for Cc (C22 to C33)
    • U2 pins 11 and 12 are named NC, but should be shorted to CAP2 pin 14.
    • R67 should have some value to set the turn off of the DSG and isolate the IC DSG pin from transients. 100 ohm or more may be suitable.
    • R75 should not go to the gate of R75, a large resistor across the diode will avoid a peak detect effect of the diode.  The diode/resistor may go to the drain path to provide more voltage for the FET gates.  A resistor from VC5X to the gate may avoid ESD damage to the transistor in some situations.  See the REGSRC section of http://www.ti.com/lit/pdf/slua749 
    • A resistor in the collector of Q5 can dissipate some heat avoiding excess heat in Q5 at high voltages.
    • JP3 is unusual in a product, more typically selected components would be installed in a divider.
    • R77 does not need to be a precision resistor since VAUX is not used, it could be tied to GND.
    • S6 and S7 should be on/off switches rather than momemtary as might be used for other switches.
    • The selectable SMB address with JP5 is unusual for a product.  For the standard address SMBA is grounded, for optional addresses SMBA connects between R97 and R103 with the ratio varied as desired, see the technical reference manual.
    • U3 GPIOA and GPIOB are generally grounded if not used, see recommendations in the data sheet.
    • Remember that SMB signals should not reference PACK- since it is switched.

    Hope these are helpful.