We are trying to modify the PGOOD delay time with a value > 20 ms (default). We write correctly on the PGDLY[1:0] field of the DEFPG Register using appropriate password (read from the register provide correct new value).
But when we perform a power cycle the delay between the LDO4 supply rise and the PGOOD rise is always measured about 25 ms even we set 100, 200 or 400 ms. It seems that the new settings are not stored on the EEPROM and are reset to default on a power cycle: but this would be very strange and would make these bits unuseful.
Thanks for the support
Antonio