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Original question:

UCC28061: Applicability Area

UCC28061: Soft Start Condition

Başak Kukul
Prodigy 50 points
Part Number: UCC28061

Hi,

I am confused while trying to understand soft-start state of UCC28061. Does overvoltage condition detected through either HVSENSE or VSENSE pin cause soft start? According the datasheet, in the Failsafe OVP section, it is stated that over- voltage detected via those two independent pins does not cause soft-start. However, in section Soft-Start, it is stated as ucc28061 asserts soft start when over voltage is detected. So, i need to understand the exact condition for soft-start.

Thanks in advance

  • 0
    TI__Mastermind 40530 points

    Hello User5889800,

    Thank you for your interest in the UCC28061 Interleaved-TM PFC controller.

    You are right, the datasheet is not clear on the distinctions between the two OVP functions and their effects on soft-start.

    The "Failsafe OVP" refers to the HVSEN input sensing function.  It provides an 2nd path for detecting an overvoltage condition on the PFC output in the case where the VSENSE path is broken.  The threshold for HVSEN OVP detection is normally set higher than the OV threshold at the VSENSE input.

    Normally, the VSENSE input is the feedback path for output voltage regulation, and if conditions result in Vout rising above the VSENSE OV threshold (6.45V), the internal OV flag is raised and a soft-start S-R latch is set to trigger a discharge of the COMP signal.  This effectively instigates a soft-start.  This is seen in Figure 27 (page 20 of the datasheet) and the text immediately below it. Normally the VSENSE OVP would be triggered before Vout can rise higher to reach the HVSEN OVP threshold.

    However, if the VSENSE path is damaged (opened or clamped somehow) then feedback is lost and VSENSE cannot detect a rising Vout.  Here, the 2nd OVP through HVSEN acts as a "failsafe" detection to directly shutoff the output drivers if the HVSEN OVP is triggered.  This is seen in the Block Diagram on page 9, where the HVSEN comparator asserts the "HVSENOV" signal which directly asserts "STOPA and STOPB signals to the gate drivers.  Since there is no path back to the COMP pin, there is also no soft-start when Vout falls below the HVSEN OV threshold and the STOPx signals are canceled.  This is partially discussed in the "Failsafe OVP" paragraph at the bottom of page 18, but not clear enough. 

    Therefore, a VSENSE OV response does result in a softs-start (provided that the VSENSE path is intact) while an HVSEN OV response does not generate a soft-start after shutdown.  

    I hope this clears up the confusion.

    Regards,
    Ulrich