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TPS53679: TPS53679 MFR_SPECIFIC_20 setting

Part Number: TPS53679

Hi TI team

We have some question about TPS53679 MFR_SPECIFIC_20 (maximum operation phase number) setting.

1. How many phase number is default setting? Because we read some MB's FW have single-phase or other phase on difference VR, so need to confirm this.

2. If MFR_SPECIFIC_20 default set and HW setting is difference, who is first priority?

  • Hi Gary, 

    MFR_SPECIFIC_20 reset behavior is as follows:

    1- Before either channel is enabled, MFR_20 is initialized to 0x00 always

    2- After either channel gets enabled, MFR_20 is updated automatically to the phase number given by pinstrapping of the CSP pins. 0x00=1 phase, 0x01=2 phase, .... 

    After boot-up, writing MFR_20 to a value less than or equal to the phase number configured in hardware will be accepted, and the phase number will be reduced. Attempting to write a phase number greater than the one configured in hardware will be NACK.