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LM5170EVM-BIDIR: Can't get the EVM to work with 48V supply only

Part Number: LM5170EVM-BIDIR
Other Parts Discussed in Thread: LM5170

Our application is the following:

48V input voltage (from a large supercap)

12V output voltage (no power supply, this voltage is fed to a 12 VDC to 230 VAC COTS converter)

We've tried several things now, but this board still is not working. Symptoms: at the output (12 V) we see a sawtooth of 1 Hz period (when not loaded), the voltage is between 3 and 5 VDC.

UVLO was computed to be below 5 VDC, but can be measured as 7.5 VDC. Currently we don't get a voltage above 0 VDC for UVLO (onboard bias circuitry used, with R4 100k & R6 10k. Further J1 was connected (1,2)

In another setup we've directly applied 5 VDC as UVLO - didn't help.

BTW we would appreciate if you could add the altium files directly to the EVM page as the PDF mentions "tools"-URL that doesn't seem to exist anymore. At least it seems to be a clean PCB layout, thanks for that.

Well at this moment we don't even now whether some component(s) on the board are broken, as it did never work as expected. Any ideas how we can sort this out please? We would really like to consider this IC in a couple of projects and try to learn with the EVM prior to creating some own layouts.


  • Hello Martin,

    Thanks for reaching out with your configuration and using the LM5170.

    Can you please provide a picture of the test board so I can see how the device is configured? Also a list of any board modifications will be helpful. Is the breaker on the 12V rail enabled or has it been shorted out?

    Thanks,

    Garrett

  • Hello Garrett

    Thanks for your interest with this problem. I'll upload pictures as soon as I figure out how to transfer them easily from the cam.

    AFAIK all the jumpers are set as described in the PDF and additionaly J1 48V (1,2) | J4 closed | J25 closed | same for J2, J8 | J5 (2,3) | J29 J28 both (1,2)

    Further as mentioned added 100k R4 and 10k R6 to derive the VDLO signal.

    What component are you referring to with "12V breaker"?

  • Hi Martin,

    Could you upload the image again? we can't open the image.

  • Dear Jasper

    reuploaded the pictures (view of the same board, but from two different angles). Hope this time you'll be able to open the pictures.

    Have a nice day

  • Dear all

    We understand that you have a plethora of questions to handle, however, we've got a time schedule to meet as well and want to get this done (read work as expected).

    Another approach would be the following: you assist us how the PCB has to be modified to work with 48V only (no supply on 12V side) and to transfer energy from 48V to 12V side to as low as possible. Subsequently we will send back the depicted PCB as it might be broken for replacement. Would this be feasible?

    hope to read from you soon. regards Martin

  • Hi Martin,

    To enable the voltage control loops the following jumpers to to be populated

    J34, J35, J36, J37

    SYNC_R jumper should also be populated

    This should make the board operate as expected.

    Thanks,

    Garrett

  • Hi Garrett

    Thanks for your reply. According to your answer this means:

    • close the jumpers instead of leaving them open
    • voltage loop controls enabled
    • which jumper do you designate as SYNC_R? J3? J1?

    According to chapter 3 UVLO should be applied. We guess this has to be derived from the 48V rail as otherwise on this net there won't be any source. Or do we miss something?

  • Hi Martin,

    Yes close the jumpers. This will enable the voltage loop control.

    SYNC_R is J3, sorry for the confusion.

    Regarding the UVLO resistors (R4 and R6) are you saying that these are populated now? Otherwise 5V should be applied to pin 2 of J31.

    Please let me know if you have any questions.

    Thanks,

    Garrett

  • Hi Garrett

    ok, J3 closed means (according to the EVM user's guide) "Disable the fault detection disabled" - we guess the disabled at the end is a typo. If we get the message of the datasheet correct this should be also closed in case of multiphase configuration? From the description how the circuit breaker should be used it's not evident why this should be disabled when LV is not actively sourced. Because of operation when difference between HV and LV when the difference is < 8 (section 8.3.16.2)?

    J31 pin 2 UVLO should be 3.3V @ J-17 pin 23? How can you operate the EVM without addtional 5V supply, with onboard components only? Possibly have to populate R4 & R6, right? otherwise UVLO can't be produced, even when J21 is closed (2,3), correct? The other option would be to populate R43 & R44. Are there advantages to use either of them? Further, once a pair of resistors is populated, we'll have the issue that HV will be a discharging voltage from a supercap - thus this voltage divider might be setup as a zener diode in series with a resistor... What is the proposed solution on this?

    thanks for your clarifications

    Martin

  • Martin,

    If the circuit breaker is used on the LV side then typically the LV voltage is set to some value and is not left floating. If J3 is not populated and you have a load on the LV side does the board work when J3 is removed? The HV side should be at least 8V higher than the LV side to ensure the circuit breaker are fully enabled. The breaker FETs are supplied by the HV supply (VIN pin)

    To operate without an external supply R4 and R6 should be populated.Typically the UVLO pin will be controlled by a external supply (MCU possibly) to enable the LM5170. Using this method will reduce the current pulled from the super capacitor. The configuration of the UVLO selected should be what is best for your application.

    Please let me know if you have any questions.

    Thanks,

    Garrett