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TPS53515: Connecting EN to VREG

Part Number: TPS53515

Hello!

Will there be no issues connecting the EN to VREG? Customer is inquiring if this will be alright. His design uses a voltage divider to the EN pin from VIN to GND but wishes to remove the resistors to minimize PCB real estate.

I was thinking that (1) the power sequence may affect the "calibration" discussed in D/S 7.3.2, and (2) the internal LDO's current capability may not suffice if it will be used as a supply to the EN or affect its stability in some way. I am, however, unable to verify or analyze further. 

Can you please help or advise if it's OK to connect EN to VREG?

Thanks a lot for your help.

Regards,
Elisha

  • The calibration happens when enable pin is 1.4V when VDD is greater than 2.8V.   If the VREG and EN are tied together then the calibration will happen at VDD>=2.8V if the VIN ramp up is slow or if the VIN ramp up is fast VDD>=2.8V and VREG>=1.4V calibration happen.   

    The RF voltage determines the switching frequency during calibration. 

    I think tying the EN=VREG could give the improper switching frequency. 

  • Thanks, David. Although, I kind of got lost in the RF part.

    From how I understand it, because the RF pin should be connected to VREG through a resistor divider, connecting EN to VREG means the EN pin will connect to the RF pin as well? This, in turn, may affect the RF voltage, and ultimately, affect the accuracy of the switching frequency during the calibration?

    Please help confirm. Thanks again!


  • There is a voltage divider on the RF pin that sets the switching frequency.   Depending on the voltage divider, there may be an error in the desired switching frequency and actual frequency.  If the RF resistors are 1kOhm and 300kOhm,  I do not think there will be an difference.