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UCC27211: UCC27211 Getting Hot While Idling, Pulling 15V rail low.

Part Number: UCC27211

I'm using a UCC27211 to drive a half bridge in a 3-phase motor controller. I ran into issues in a previous version of my design where the UCC27211 would get hot. I respun the board because I was seeing ringing on the HO pin, mainly due to the driver being somewhere around 3 inches from the FET. The new board places the driver ~400 mils from the gate of the FET.

At first test, we believe we had some shoot-through, and began testing to verify. We disconnected the higher voltage from the board and powered logic only.

At first power-up, everything appeared to be fine. We tested drive voltages, looked at input signals. What we found was that after about 10 min of testing, the 15V power rail was reading about 5V, and the UCC27211 drivers were hot. Again, our Motor Power voltage was 0, only the logic power supplies were on. So the FETs only saw GND and VG, if anything. I should note that the 15V supply is rated to supply up to 1 amp. 

Bootstrap capacitance was calculated based on Qcg of the FET, and later fine tuned when it was realized that Vgs for Q1 was insufficient as calculated to push the FET out of the linear region and into saturation. Operating frequency is 32kHz. 

Can someone shed some light?

 

  • Hi, Anthony,

    My colleague who supports this device is off for the holidays.  

    A couple things to check: make sure you aren’t getting ground bounce between the input and output sides, make sure the HS pin isn’t being pulled below ground, and make sure your MOSFETs are no oscillating in the MHz range. You will need a fast scope to see these behaviors.

    You may also try adding gate resistors which might help quell the oscillations.

    If you could post your layout, that would help Richard when he gets back next week.

  • Hi Don, 

    Thanks for getting back to me. I'll check for ground bounce but I'm uncertain of how that could be if there's no power available to flow through the FETs.... The HS pin cannot be pulled below ground - keep in mind my issue stems while the motor power net is at 0V. I'll try to check for oscillations in the MOSFETs but in the interim I'll try adding gate resistors - 2.1 ohms should be sufficient. 

    Layout for one phase is below - they're all the same. Keep in mind the power and ground planes have been removed from this view for clarity. This is an 8 layer board, top layer is power, and alternates layers with ground, but only where MOS are present. 

    With the absence of power on the MOTOR_POWER net, would this cause the driver to heat up? I am not certain as to how the charge pump functions, but I can presume (at this point) that having no power to drive would cause the driver to overheat, since the driver is trying to charge CB while HS is at 0V. Thoughts?

     

  • You guys still out there?

  • Hi Anthony,

    Thanks for patience. As Don mentioned, Richard, our Apps Engineer, is on vacation.

    I am a Systems Engineer and shall try to help you.

    If you are still observing that the 15V bias voltage is sagging to 5V, then it means that there is something wrong on the 15V rail. It could be driver or it could be any other device. Have you replaced UCC27211? Have you replaced MOSFET? Did you check the 15V bias supply without gate driver IC? Would the 15V droop even if the inputs of the UCC27211 are held low? Do you have some waveforms to share?

    Does this happen to multiple boards? If so, then it is a systemic problem. If it is happening only on this board then we can isolate the problem to the board.

    Setting power bus voltage to 0V does not affect the performance of the gate driver. From the schematic and layout nothing seems to indicate that 15V bias supply should droop. Quick calculation shows that the switching losses in the driver IC would be around 0.25W considering 15V bias voltage, 211nC of total gate charge, and 35kHz of switching frequency. This much power dissipation shall not cause excessive heating or bias rail droop.

    Try to do ohmic measurement (of course nothing shall be powered) from each pin of the gate driver to the ground of the gate driver, e.g. VSS. They all should be relatively high impedance. Also do ohmic measurement of MOSFET gate to source and drain to source.

    I would also recommend you to remove the MOSFETs and then look at 15V rail, input of the gate driver, output of the gate driver, and gate driver case temperature (this would be powered up test, but only 15V rail and input of the gate driver). If somehow the MOSFET gate to source is low impedance then that low impedance appears as a load on the gate driver and that can cause both the droop in bias voltage as well as heating of the gate driver IC.

    I would do all these measurements one by one and I may replace the gate driver IC multiple time as there may be a low-impedance path on the board and driver IC may be getting damaged every single time it is powered up.

    Please let me know how these tests go.

    Regards,

    Ritesh

  • Ritesh,

    Thanks for getting back to me. For starters, removing those FETs... if it isn't impossible, it's tough. That's an 8 layer, 4 ounce copper board, and removing the FETs takes a while to do as the thermal mass is incredible. 

    As for the power supply failure, we witnessed it on 2 separate boards (That's all we powered up) under the same conditions - MOSFET voltage = 0. If the system is fully powered, the chips appear to be fine indefinitely - we left them on like this for over an hour. 

    15V supply is fine, I replaced the FET drivers and the voltage picked back up to 15.2V. Something caused a short. We only had scope probes connected to the board... This is a 1 amp supply, so there must have been a hard short. I've checked for low impedance paths on the board, there are none. 

    I'm constantly checking the FETs. We had one board with shoot-through at one point, which I'm not sure of why, but it popped the FETs on that phase. I suspect it was because my bootstrap cap value was too high. On a previous board, it worked fine with double the bootstrap value because the gate drivers were far away, and there was a little ringing, and for some reason (not sure, can only speculate), the higher bootstrap value mitigated this. On the current version of this board, I'm back to my calculated value of 324nF (330nF). Reducing the bootstrap value seems to have fixed the dead time issue, but it has lowered my gate voltage on the high side, to 13V. This isn't an issue for me as anything over 11V keeps the FET in saturation. 

    Any more thoughts?

    Tony

  • Hello Tony,

    Thank you for the update. It sounds like with your latest testing and configuration of boot capacitance of 330nF that the issue of the driver impacting the 15V bias is resolved.

    Regarding the possible tradeoffs of larger bootstrap capacitance, there is a consideration. The bootstrap capacitor is charged when the low side FET is turned on and the driver HS pin switches to ground. If there are narrow pulse widths on the low side driver and high bootstrap capacitance, there may not be adequate time for the boot capacitor to fully charge from 0V on the initial pules(s).

    If you are seeing shoot thru on the power train, confirm that there is not any noise spikes on the driver LI or HI input that may cause false triggering. Since you are running low frequency motor drive, you can likely afford to have some small R/C filter on the driver inputs to reduce voltage spikes or ringing if they are a concern. A 50 Ohm and 100pF capacitor would be good initial values which will have little impact on delays.

    Regards,