Part Number: BQ25619
Hi there,
As we are working on the design for the BQ25619, a few questions came up:
- If we are not using the the BOOST function, what is the best termination for the PMID pin?
- If we understand correctly:
- as explained in the Narrow VDC Architecture paragraph, the battery charge voltage is fully controlled by the Buck operating voltage point SYS (at least when VBAT is > Minimum System voltage + 180mV). In this case BATFET is fully ON and the buck is operating in current regulation as long as it is in the CC part of the charge - is that correct?
- But during DPM, when charge current needs to be reduced to supply SYS Loads in priority, what is the mechanism used to control ICHG - is it BATFET operating in LDO mode with current regulation mode?
- And, in this case, what voltage point is set for VSYS? Does it increase to make headroom for the increased VDS of BATFET?
- What is the behaviour of the chip if no battery is connected? What is for example the voltage point for VSYS ?
Best Regards,
Mickael