This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

PCB layout question

Other Parts Discussed in Thread: TPS56C215, TPS62135, TPS562219A, TPS62827, TPS62825

Hi Team,

My SSD customer has some question about the layout: 

(They are planning to use TPS62827, TPS62825, TPS62135, TPS562219A, TPS56C215.)

1. Could you kindly provide the layout guide of the layer under inductance (LX) that should be empty or ground? Or any special pattern?

2. How to evaluate the change in inductance due to the layout of the PCB?

The customer has 8 layers in their design.

Thanks for your kindly help!

Jamie