Hi,
According to TPS51460 data sheet, the PWRGD pin is pulled low when the VSENSE is lower than 92% or greater than 109% of the nominal internal reference voltage.
So, could you please tell me the response time when the PWRGD pin is asserted and de-asserted?
I am considering connecting this PWRGD pin to the enable pin on another dc/dc converter. So, please let us know if you have any concerns.
Best regards,
Kato