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CSD18502Q5B: Question Based on Video with this Part

Part Number: CSD18502Q5B

Hi -

Posting on customer behalf. 

I was viewing a TI education video on understanding FET SOA curves (https://training.ti.com/understanding-mosfet-datasheets-safe-operating-area-soa).  I am trying to understand how the FET SOA limits are determined for the transient pulse conditions.  In that video a simplified block diagram of the tester is shown.  What I am trying to understand is if these transient tests are holding Vds constant when a load pulse is applied OR is the FET switching from the applied Vds value to its saturated state.  In other words is the Vds on the SOA graph x-axis a static or dynamic value during SOA testing?  It would be good to see a timing diagram of Vgs, Vds, and Id to understand what is happening during the pulse test.  I want to make sure my interpretations of SOA curves are not overly conservative or just plain incorrect.  Can you help?