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UC1825-SP: Soft Start Capacitor

Part Number: UC1825-SP
Other Parts Discussed in Thread: UC1825B-SP

Hey there,


I am looking for a formula to calculate my soft-start capacitor value? Something along the lines of Tss*(Discharge current)/(Vt). I noticed in the old Unitrode datasheet it mentions .1uF, but doesn't explain how to calculate.


Also, where should I get the voltage for the I Lim? Is this a sense resistor at the output pins?

Thanks,
Stephen

  • Hey Stephen,

    ILIM will shutdown the device.

    Commonly in current mode, this will be from the same place as current sense. Commonly the measurement is of the input current in one way or another rather than the output current, since there is some relation between the two, as well as the input current will detect shorts in the converter.

    Soft start is a bit harder to talk about.

    The soft start circuitry doesn't necessarily have a threshold where the device is then out of SS.

    The SS pin simply clamps the comp voltage  to set a maximum duty cycle. This means the time the SS takes is dependent on the duty cycle the converter wants to settle at, as well as the current flowing through the current sense in current mode. This is why there isn't an equation to determine the exact soft start time.

    Thanks,

    Daniel

  • Hey Daniel,

    Thanks for your reply. The I Lim I understand.

    The SS pin leaves me perplexed. Are there any graphs that show general behaviors? As I understand it, the PWM comparator is at 1.25V. So is the maximum differential between the inputs 1.25V then?

    Therefore, on the cold start of a control loop where the difference at the comparator inputs is the full 1.25V, how long at different values does it take to charge the cap? Is this a standard RC circuit?

    Any examples or literature would be helpful.

    Thanks,
    Stephen

  • Hey Stephen,

    The UC1825-SP has a 100 krad TID version called the UC1825B-SP.

    The UC1825B-SP has an EVM with a user's guide that shows waveforms of the device starting up, but I don't think it will show what you want.

    EA OUT can be at 1.25 V, but this will change under many conditions such as input voltage, loading, steady state duty cycle, ect.

    The voltage range is rather close however.

    Figures 16 through 19 here:

    http://www.ti.com/lit/ug/sluubz0/sluubz0.pdf

    show the device over voltage and over output load, and there are difference inbetween them

    Note that Figure 18 has a different time scale which is somewhat annoying when showing this.

    To explain further why the threshold will change:

    EA OUT is whatever voltage threshold that will cause the proper steady state duty cycle when compared to a voltage ramp in voltage mode or a current ramp signal in current mode. The controller changes this voltage using the error amplifier.

    So there could be a point where the controller settles at 1.25 Vs, 1.5 Vs, really anywhere in the range of the output of the error amplifier. The SS pin works like a clamp for this voltage, also effectively acting as a maximum duty cycle clamp. (Higher EA OUT = more duty cycle)

    When the SS ramps up, it increases the maximum duty cycle of the controller, thus is the controller is trying to get to 25 % rather than lets say 40 %, the soft start will go faster getting to 25 % rather than 40 %.

    Thanks,

    Daniel

  • Hey Daniel,

    I believe I understand the theory pretty well now, but it's the implementation I am still stuck on.

    Let me try asking it another way.

    Ct = 20nF
    Rt = 7.5k
    VC = 12v
    VCC = 13.5V
    OutA and OutB go to the gate of two power FET's

    The inverting terminal receives an analog input which (hopefully not) may need a type II compensation circuit. The NI terminal is programmed by a DAC so I can guarantee the EAOUT is not above 1.25V. Upon startup, I would like for it to take ~10ms to reach ~20% duty cycle. 

    If you were in my shoes, how would you calculate your SS capacitor value? 

    Edit:

    Is this the solution?

    V=Q/C

    Q = 9uQ/s = 9uA

    (.2)*(1.25V) = (9uA*10^-3 seconds)/(x Farads)

    Solve X = 1.44 nF


    Thanks,
    Stephen


  • Hey Stephen,

    I would likely do it the same way your edit showed.

    I do what you to understand there will probably be some variation in the 10 ms and some testing for verification may be required.

    Thanks,

    Daniel

  • Hey Daniel,

    What is the threshold of the inhibit BJT on the EA comparator ? Ultimately we are trying to hit the threshold of that BJT at a time under our control, correct?

    Therefore, the math should be  (.2)*(Threshold Voltage) = (9uQ*10^-3 seconds)/(x Farads)

    I assumed 1.25V, but this may be an incorrect assumption. I am trying to use TINA to simulate this. If you can get that software to do anything useful you are a better man than me.

    Thanks,

    Stephen

  • Hey Stephen,

    What might be a lot easier is finding an approximate threshold from the EVM User's guide I mentioned earlier.

    This is based on Figure 16 here:

    http://www.ti.com/lit/ug/sluubz0/sluubz0.pdf

    No load start-up has the cleanest signal, so I will go with that.

    @1ms/div it takes approximately 1.5 divisions for the output voltage to come up or 1.5 ms. This is using a 15 nf capacitor.

    A 9 uA current source will bring the voltage on the 15 nF capacitor up to 0.9 Vs in 1.5 ms.

    Thus we can approximate the threshold to around 0.9 Vs.

    Thanks,

    Daniel

  • Thanks Daniel. Now I shall build the board and find out how wrong I am ; )