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TPS65217: Timing of PWR_EN

YoungYun Kim
Intellectual 410 points
Part Number: TPS65217

To the person concerned

This Ticket is related to "Powering the AM335x with the TPS65217x" application note ( Doc  number : SLVU551I).

Exact Part number on this ticket is TPS65217C. As you know, the above application gives guide for PMIC and AM335x combination, Power sequcne.

Power sequence for TPS65217C and AM335x is depicted on Figure 6. While

My constomer looked into detailed timing related parameters( STROBE, DLY), He found out that there is no  timing table among power rails and other singals of TPS65217C.

So Customer wants to get your help for below two things.

Q1) Is there Minumum timing between VSYS and PWR_EN? Datasheet says only Maximun 5 seconds requirements.

Q2)  Can the Slew rate of PWR_EN ( rising time) affect internal LDO and DC/DC outptu?

-> For circuit verifiation, Customer added R-C time constant on PWR_EN and extened time between VSYS and PWR_EN, from 80 uS to 1.2mS.

-> Result : Before adding R-C time constant,  LDO outptus were ramped up sharply but after extention as 1.2mS, some of LDO output had different waveforms in the attached figure.

-> Please see waveform in red box. Before adding R-C time constant, the waveform wasn't occurred.

3

Thank you

Best Regards

Mark Kim

  • 0
    TI__Mastermind 30280 points

    Mark,

    The TPS65217 -C version is being used to power the AM335x. The PWR_EN pin on the TPS65217 PMIC is driven by the PMIC_PWR_EN signal coming from the AM335x processor. It is common to copy reference designs and follow the schematic exactly. For example, if you follow the BeagleBone Black reference design there would be a direct connection from PMIC_POWR_EN to PWR_EN pin (no Rs and Cs).

    YoungYun Kim said:

    Q1) Is there Minumum timing between VSYS and PWR_EN? Datasheet says only Maximun 5 seconds requirements.

    No, there is no minimum. It is acceptable to tie PWR_EN directly to VIN (AC or USB), and in this case there is no delay at all.

    YoungYun Kim said:

    Q2)  Can the Slew rate of PWR_EN ( rising time) affect internal LDO and DC/DC outptu?

    No, the slew rate of PWR_EN will have no impact on LDO and DC-DC output. My guess would be that there is another power supply in the system (LDO or DC-DC separate from TPS65217 PMIC, and this discrete regulator is powering on before LDO3. This could cause a voltage to be seen on LDO3 before it is enabled in the power sequence due to a leakage path through the AM335x Sitara processor.