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TPS62812-Q1: Question about spread-spectrum clocking (SSC) operation

Part Number: TPS62812-Q1

We are interested in operating this chip in SSC mode. We would like to get more data about this - i.e. how does the noise power spectrum look like when we operate the feature vs. "normal operation,

how is the spread  spectrum achieved - i.e. is there mode hopping or special wave form used?

We are looking as sampling the output at ~40uSec integration time and would like the spectrum "spread" during that period.

  • Hi,

    The difference between SSC and without SSC is captured in this app note :http://www.ti.com/lit/an/slvaeg8/slvaeg8.pdf  

    Which configuration are you planning to use for the device?

    Best regards,

    Tanvee

  • Thanks for the reference.

    The app note mainly shows the effect of operating two DC2DC in parallel in different modes on the input voltage/current. We are interested in the effects on the output ripple current of a single DC2DC and whetehr the SSC will help vs.the nominal fixed frequency switching (2.25MHz)

    I think what best emulates what we want to know is the difference between the fifth example Spread Spectrum Operation and the second example Synchronization to an External Clock. We can see there that the input voltage levels at the switching frequency at 50KHz RBW where reduced by ~4dB in the SSC mode. 

  • Hi,

    The effect on the output ripple would be negligible between SSC on and Off device for fixed switching frequency. Could you please explain what is the concern here? 

    Best regards,

    Tanvee