In CSD87334 diagram, Tgr is connected to SW internally.
Is there any problem if I connect driver IC to SW node instead of Tgr?
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In CSD87334 diagram, Tgr is connected to SW internally.
Is there any problem if I connect driver IC to SW node instead of Tgr?
Hello Junjie,
Thanks for your interest in TI power blocks. We provide the Tgr pin as the return path for the top FET gate drive loop. This separates the high side gate drive loop from the high current loop. As such we recommend connecting it directly to the LL (or SW, LX, PH, etc.) pin of the gate driver IC. If you cannot connect directly to Tgr, you should be able to connect to SW but this can introduce more switching noise into the gate driver IC. If it all possible, we strongly recommend connecting directly to Tgr.
Hello John,
Thanks for your answer. I will connect the driver IC to Tgr pin for best performance.