Regarding soldering QFP-48 package of the TPS92662-Q1
In the Datasheet there is a lead to Package height tolerance given of 50-150µm. Since the package has thermal pad, this tolerance has impact on solder print volume requirements.
We see with the recommended stencil design a large variation in post-reflow solder coverage at thermal pad, which is close to 50% (IPC recommends >50%) for lead gap of ~120µm
How can we ensure this height variation will not lead to
A: less than 50% thermal pad coverage if lead gap is 150µm
B: solder balling at thermal pad due to too high solder volume at 50µm gap
