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TPS3703-Q1: Delay Time Calculation

Part Number: TPS3703-Q1

Hello,

I have some questions about TPS3703-Q1's delay time calculation.

  • Can the two equations to calculate the Min and Max delay time, Equation 2 and 3 on page 18 of the data sheet, be applied to any variations of the TPS3703-Q1?
    • tD(min) = 2.7427 × CCT + 0.3 ms (2)
    • tD(max) = 3.4636 × CCT + 0.7 ms (3)
  • Do these equations cover a full temperature range?
  • Do these equations cover the recommended operating VDD range?
  • What's the unit of CCT in these equations? µF, nF, or pF?
  • What's the "/RESET Timeout" in Figure 20 of the data sheet? The values on the plot differ from those on Table 4 on page 19.
  • What's the Max TSD value - Startup delay of the TPS3703-Q1? The data sheet describes only the nominal value.

Best regards,
Shinichi Yokota

  • Hi Yokota-san,

    Let me answer your questions below:

    1. Yes, these equations can be used to apply to all shown variations of the TPS3703-Q1 (except 'H' version, not programmable)

    2. Yes, the equations for minimum and maximum include temperature variation.

    3. Yes, the equations are only based on the internal CT charging current, capacitance value, and CT comparator threshold voltage.

    4. In these equations, Cct is in nF

    5. I will confirm with design why the differences exist here. This could be a difference between how the equation was made and the graph was tested.

    6. The startup delay is only limited by how large a capacitor you use, not by our device's capability.

    Thanks,
    Abhinav.

  • Abhinav-san,

    Abhinav.Sharma said:

    6. The startup delay is only limited by how large a capacitor you use, not by our device's capability.

    I think the tSD is a portion of the entire start-up delay which is dependent on the device. If it's correct, is it possible to share with me its possible Max value? Or, do you mean the tSD is smaller than the tD and the tSD can be ignored? Even if it's true, I'd like to have a rough estimate on the tSD's Max value.

    I'd like to ask one more question.

    • How will the TPS3703-Q1's /RESET output behave when the SENSE voltage drops just after the VDD rises beyond the VDD(MIN)?

    Best regards,
    Shinichi Yokota

  • Yokota-san,

    Sorry for the confusion. The startup delay (tsd) is device internal and not based on the capacitor. We do not have a maximum for this value but it can be treated as a maximum. The startup delay occurs no matter what, so you must account for at least this 300us.

    For the second question, the RESET should drop after the tsd + td.

    Thanks,
    Abhinav.