Hello,
bq769x0 datasheet (SLUSBK2G) does not mention how cell balancing is controlled by the chip.
Only the following is mentioned on page 29:
All cell balancing control bits in CELLBAL1, CELLBAL2, and CELLBAL3 are automatically
cleared under the following events, and must be explicitly re-written by the host
microcontroller following clearing of the event:
• DEVICE_XREADY is set
• Enters NORMAL mode from SHIP mode
Question 1:
Does the bq769x0 chip disable cell balancing if chip enters from NORMAL mode to SHIP mode?
Question 2:
Does the bq769x0 chip disable cell balancing if fault is detected: for example, UV, OV, SCD, OCD, or are the balancing transistor controlled only by software commands?
Question 3:
Is it possible to keep cell balancing on until cell voltage becomes zero volts?
I am trying to figure out if there is a such failure mode that would leave the balancing transistor on that would cause the battery cell to be discharged fully and, thus, brick the whole battery. This could happen if there is, for example, 1) software bug that stops communication between bq769x0 chip and host microcontroller, or 2) software bug in the balancing algorithm, or 3) host microcontroller failure.
Best regards,
JM