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UCC29950: SURGE FAIL

kown jun hyeong
Prodigy 40 points
Part Number: UCC29950

Hello team
The 150W SMPS was designed using UCC29950.
It works without any problem under normal conditions
However, FAIL occurs due to RESET of UCC29950 during SURGE test.
Test conditions are L-N 1KV / L (N) -F.G 2KV.
It is judged that the result of various tests is not influence between EMI filter composition and pattern.
It seems that the reset is caused by the influence of AC1, AC2, SUFG and SUFS of UCC29950.
When AC line surge occurs, it is doubtful whether RESET occurs due to influence of Depletion mode FET (BSS126).
Send the circuit configuration together.
Let me know if there's anything I should be careful about.
Please help ...

  • 0 in reply to kown jun hyeong
    TI__Mastermind 40120 points

    Hello Kwon Jun,

    Thank you for your interest in the UCC29950 controller.

    I'll try to help you with the surge issue, but I need to study up on the device behavior first.  I may need some time to consult with others on it, too.

    I will get back to you on this in one or two days.

    Regards,
    Ulrich.

  • 0 in reply to Ulrich Goerke
    TI__Mastermind 40120 points

    Hello Kwon Jun,

     

    I’m sorry for the few days delay for my reply. Based on my analysis, I think the surge-induced resets may be due to one or two possibilities.

     

    In the UCC29950 datasheet, on page 28, there is Section 7.3.23 which describes the three types of faults and the controller response to those faults. I rule out the latching faults because these are checked only before start-up, not during operation. I rule out several other “long” and “short” faults because they don’t make sense.

    That leaves me with 2 possible faults that make sense:
    a) the “long” fault: PFC Stage Second Current Limit, and

    b) the “short” fault: VAC > Vac(high_rising)

     

    I think the surges may be triggering one or both of these faults, depending on the path of the surge currents.
    The 1kV L-N surge may be triggering the “VAC > Vac(high_rising)” short-fault. This can be tested by observing whether the PFC restarts after 100-ms of OFF time.

    The 2kV L(N)-F.G surge may be triggering the “Second Current Limit” long-fault. This can be tested by observing whether the PFC restarts after 1-sec of OFF time.

     

    The VAC-high fault is detected at the AC1 and AC2 inputs. These have an internal 60K resistance to GND. That means the external 470-pF filter caps form RC time constants of only ~28us.
    I suggest to increase these caps to maybe 10x or 20x to see if it solves one or both of the surge resets.
    If it does solve the resets, then reduce the cap values incrementally until the surge problem returns. Then add back some increment for margin to variations.  The extra filtering may affect the current waveshape, so retest the harmonic distortion of the input current after making the cap increase.

     

    The Second Current Limit fault is detected at the PFC_CS input. The ripple voltage is important at this signal, so it cannot be filtered excessively. You can try increasing your C15 a little, maybe 2x to 4x or so, to 1~2.2 nF. I suggest to also try removing CY3 which may be coupling common mode surge current through R51. If CY3 is necessary for EMI reasons, try relocating it to the other side of R51.

     

    These are the suggestions that I have thought of, based on my reading of how the IC works (from the datasheet) and considerations of where the surge currents may be flowing. If one or both of these suggestions do not work, please continue to follow this method to determine the surge current path and find ways to divert it into some other path (with benign effects) or to clamp the sensitive signals which the surges may be affecting.

     

    Regards,
    Ulrich