LM5122: About max duty limit circuit

Hi Yusuke-san,

Thank you for posting.  However, I am confused by the question.  The LM5122 does not support 100% duty, If you mean the sync FET, yes the LM5122 supports the sync FET to be always ON when VIN>Vout.   

Either one, if you talk about 100% duty, that means there will not have any switching action. Otherwise, it is not 100% duty.  So, your question about charging and discharging the gate-source really confuses me.

If you can show me some diagram like key waveforms, it may help us to fully understand the issue, then we may be able to recommend something meaningful. 

Best Regards,

Youhao Xi, Applications Engineering

Hi Xi,

Thank you for your support.
〉However, I am confused by the question.
〉The LM5122 does not support 100% duty,
〉If you mean the sync FET, yes the LM5122 supports the sync FET to be always ON when VIN>Vout. 
I gave you the wrong information. And I'm sorry, my explanation wasn't enough.
Not 100％ duty but full ON (Operating the device is extended as long as the ON time possible). 
Do you know external circuit examples that limit ON time?

〉If you can show me some diagram like key waveforms, it may help us to fully understand the issue, then we may be able to recommend something
〉meaningful. 
I will request the submission of the waveform image to the customer.

Regards,
Yusuke

Hi Yusuke-san,

Can you tell what is the actual reason that you need to do this?  Do you mean that you want to cut the duty cycle short?  For instance, the IC may issue 80% duty cycle but you want to cut it to 50%? 

Thanks,

Youhao

Hi Youhao,

Thank you for your response.
〉Do you mean that you want to cut the duty cycle short?
Yes.
FET cannot turn off completely because the charge and discharge of the gate-source capacitance cannot be completed in time.
By restricting Duty, Customers want to cover the large gate-source capacity.

Regards,
Yusuke

Hi Yusuke-san,

Sorry I do not fully understand the reason.  May I bother you to show me a graph or drawing, which can illustrate what they want to do but not able to do at this moment?

The LM5122 has large forced off time.  It is 330ns typical.  It means there will be at lease 330ns to turn off the FET.  In a real application with lower duty cycle, the off time is longer because the duty cycle is away from the maximum duty and the extra off time is added to the 330ns min off time.  This should be long enough to discharge the MOSFET gate-source capacitance.  How high that gate-source capacitance it can be in this application?   Did they add additional capacitor across the MOSFET gate-to-source? If yes, why?

Thanks,

Youhao

Hi Youhao,

Sorry for my late reply.
I am asking customers to update their status and waveform.
However, I have not received a reply yet.
Should I close and re-question for this E2E?

Regards,
Yusuke