How does one calculate the maximum slewrate of a design using the D-CAP, D-CAP+, or D-CAP2 controllers from TI? Assume, 12V, 1.5V out, 16A maximum sustained current on the output.
Shawn,
There are a few limiting factors on the transient response of a D-CAP mode controller:
1) Once an ON-TIME has started, the ON-TIME must complete. There is no interupting the One-Shot timer. This defines the minimum delay in responding to a falling load current. Once the On-Time has completed, the controller responds with 0% duty cycle until the output voltage falls to the reference voltage.
2) Once the ON-TIME has finished, a new on-time can not start until after the minimum OFF-time has completed. This defines the minimum delay in responding to a rising load current.
3) The maximum duty cycle for a D-CAP mode controller defines the maximum output current slew-rate. For Constant On-Time D-CAP, this is TON / (TON+TOFF(min))
To fill in these required values, I'm going to use the TPS51116 controller as an example:
During a Load Step (Increase) there could be a delay upto the minimum OFF time (350ns) before the PWM turns ON.
After this delay, the Inductor current will slew in steps of: ( VIN - VOUT ) / L during the On-Time and VOUT / L during the OFF time. This can be calculated in discrete steps or estimated as an average Slew Rate of [ (VIN - VOUT) *Ton - (VOUT) *Toff(min) ] / [ L * (Ton+Toff(min)) ]
From your example, substituting a 0.6uH inductor this would be :
[ (12V - 1.5V) * 2.5us * 1.5V/12V - 1.5V * 350ns ] / [ 0.6uH * ( 2.5us * 1.5V/12V + 350ns) ]
[ 3281.25nV-s - 525nV-s ] / [ 0.6uH * (662.5ns) ] = 9.58A/us (Again, this is the average slew-rate over several switching cycles)
This occurs in pulses of 10.5V / 0.6uH = 17.5A/us for 312.5ns - 5.5A increase (On-Time) - and -1.5V * 0.6uH = -2.5A/us for 350ns - a 0.875A decrease (Off-Time)
The Load Dump condition is much easier, after the On-time delay (312.5ns from the above example) the inductor current will drop at 1.5V / 0.6uH = 2.5A/us, until the output voltage drops to the target value or the inductor current reaches zero, when the diode emulation circuit turns off the low-side FET and the inductor current slew-rate falls to 0A/us until the ouptut voltage recovers by the load condition and switching resumes.
The addition of synthetic ramp and slope compensation in D-CAP+ and D-CAP2 change the delays slightly, but the final slew rate is similar.
In Fixed Frequency D-CAP, The delays are slightly different, as is the maximum duty cycle.
The delay to a load-step could be equal to the nominal OFF time (1 - Vin/Vout) / Fsw, since the control circuitry needs to wait for the next switching cycle to be started before the driver can be turned ON while the minimum ON time provides the maximum delay to a drop in load current.
Fixed Frequency D-CAP control also allow much higher duty cycles, 95-99% and allows modulation of the ON-TIME, making the maximum rising slew-rate:
[ (VIN - VOUT) * D(max) - VOUT * (1-D(max)) ] / L - Very near the On-Time inductor slew-rate of 17.5A/us
