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LMG1020: Amplitude of current pulse is lower than expected

Part Number: LMG1020
Other Parts Discussed in Thread: TIDA-01573, LMG1025-Q1

Hi TI experts,

I have built a pulsed laser-driver board following LMG1020EVM. I have put parts as close as possible to reduce parasitics. In addition, layout is very similar to EVM, as shown below.

By tuning pulse width of input signal, I can get approximately 1 ns pulse at AND gate output and LMG1020 output (Vgs signal for subsequent FET), as shown below. In addition, pulse width of AND gate/LMG1020 is proportional to that of input signal. The peak amplitude of current pulse equals to VH divided by 1 Ohm (equivalent resistance of the 4 paralleled resistor).

Afterwards, I replaced the dummy resistors with a pulsed laser diode and performed measurement. The output of AND gate and LMG1020 is the same as before. However, the amplitude of current pulse is only 2 A at 20V high voltage, which is abnormal since the series resistance of a laser diode should be less than 1 Ohm, we should have current pulse higher than 20 A (20V divided by series resistance of LD) instead of 2 A. Why dramatically reduced amplitude of current pulse when FET is loaded by laser diode?

I hypothesized that the parasitic inductance of wire and LD package blocked capacitor discharge. Therefore, I increased the pulse width of input signal. As shown below, the amplitude of current pulse is still very low even at steady state. In addition, we can see a very fast rising edge at the beginning of the waveform and a slow tail until stead state. Why such low amplitude current pulse and why two distinct rising edge?


  • Hi, 

    Thanks for your question.

    Have you reviewed this design? It provides more details on driving a laser diode with the LMG1020.

    http://www.ti.com/tool/TIDA-01573

  • Hi User,

    Thanks for sharing issue about lmg1020.

    The 1020 output gate trace (including the gate resistors) look very long and skinny. This will add to the inductance which can limit the gate drive performance. Can you make the traces wider with a plane pour and the traces shorter by nudging 1020 up toward the GaN?

    Do you have a schematic to accommodate the layout?

    How long and wide are your laser leads?

    Do you achieve better performance using the 1020 EVM and your laser?

    Thanks,

  • Hi Jeff,

    Thanks for your reply.

    1) I cannot place LMG1020 closer to FET due to SMT assembly requirement. Please note that when load is four dummy resistors instead of laser diode, the circuit function properly, and I can have peak current approximately equals to VH (high voltage externally applied) divided by 1 Ohm. In addition, the gate-driving signal have trivial RLC oscillation (please refer to Fig. 2 I posted earlier) and can be further reduced by proper selection of Rg. So, I don't think parasitic inductance in gate drive loop is the cause of this problem.

    2) Schematic is the same as LMG1020EVM supplied by TI (pleaser refer to .pdf file below). Part number and package of all components are also the same as EVM.

    mother board.pdf

    3) Laser diode is TO packaged and is assembled to board like any other in-line package part. A photograph of the board as well as datasheet of the laser diode are attched below. The resistors are removed when evaluation performance of laser diode.

    1 (14).pdf

    4) The LMG1020EVM is on delivery, I will update testing results shortly.

    Looking forward to your reply.

    Thanks.

  • Hi Don,

    Thanks for your rapid response. I have reviewed TIDA-01573 and discovered two defects in my layout:

    1. Layout of power loop is not symmetrical with respect to FET so that I will not achieve half parasitic inductance.

    2. Power loop is physically larger than that in EVM (longer wire in my layout).

    However, I do not think these defects are main causes of malfunction of my board since, as I mentioned earlier, when populated with four paralleled resistors, the circuit function properly and I can get tens of ampere of current in a few nanosecond. Once resistors removed and laser diode assembled, the amplitude of current is limited to a few ampere range. I can not figure out why.

    TIDA-01573 leads to another question: what is the difference between LMG1020 and LMG1025-Q1?

    Looking forwards to your reply.

    Thanks.

  • Hi,

    Thanks for the update,

    The power loop inductance can affect the gate loop if the gate loop inductance is large. A higher gate resistor value is needed to counter act or dampen the loop inductance ring.

    My recommendation is to nudge 1020 closer to r39/r40 as well as nudge r39/r40 to GaN to help this.

    Check out this Lidar app note that explains the differences between 1020 and 1025, which is basically the package dimensions.

    GaN Gate Driver Layout Help

    Thanks,

  • Thank you, Jeff. I have evaluated LMG1020EVM supplied by TI and measured optical power is even lower than my board. I think both my board and EVM board are good while my optical power meter requires calibrating. Sorry I brought you trouble. Thanks again for your rapid and fruitful reply!