Hello all,
I'm looking the DCAP 2 topology, and could find this.
I know that DCAP 2 has internal ripple injection circuit for the low ESR output capacitor, and "Emulated Ramp Generation" looks like internal ripple injection circuit on the the below picture.
Usually the ripple injection circuit is composed with Rr, Cr, and Cac, but there are CSP, CSN. I read all the document, but I do not understand what these are, how they work and the relationship between Vref, Vfb, CSP, CSN on here.
Could you please explain more detail?
http://www.ti.com/lit/an/slva762a/slva762a.pdf
Also, I do not understand the relationship between CSN_NEW, CSP, Vref, Vfb about DCAP 3 on this document.
Could you please explain, also?
Thank you