UCC27712: TINA-TI

Hello ACGUY,

I am looking at the simulation, and I am seeing the waveforms up to ~50us and floating point overflow message. Is that what you see in your case?

For the bootstrap capacitor value: I suggest you review the datasheet Section 8.2 which gives guidance on selecting the bootstrap capacitance.

Regards,

Hello Richard,

>> Is that what you see in your case?

No. But I don't know where to fix. Could you instruct it of TINA-TI?

>> I suggest you review the datasheet Section 8.2 which gives guidance on selecting the bootstrap capacitance.

That's a proper capacity calculation, right? This is not the capacity calculation required to keep FET_On for 30-msec. If you pointing out the improvements, I'll can it fix myself maybe.

Regards,

ACGUY

Hi, ACGUY,

What error do you get in TINA?

To calculate the bootstrap capacitor size, you need to calculate the losses to determine the amount of capacitance to maintain the output voltage about the UVLO trip point. This will be the IDD of the high-side driver, as well as the leakage current of the gate structure of the mosfet.

Hi Don,

The attached design-file has convergence problem. When changed the power stage from FETs and inductor to capacitor only, TINA-TI has run simulation. So, I think that there is issue on around power stage. Could you tell me about should be corrected point?

Best regards,
ACGUY

2627.slum599 (1).TSC

Hi, ACGUY,

Please check this post - you may need to change the TR minimum Time Step in order to get your simulation to converge correctly.

Let us know if this doesn't fix the issue.

https://e2e.ti.com/support/tools/sim-hw-system-design/f/234/p/858375/3178674#3178674