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BQ25895: BQ25895RTWR

Part Number: BQ25895

Hi there,

We are using BQ25895RTWR BMS IC, in the reference design pdf of the BQ25895 evaluation module it is mentioned that the PCB layout of 4 layers, the understanding of 4 layer design is to provide the proper ground and power plane for heat dissipation and also to reduce routing complexity. 
So we are keen to know is there any other purpose of using 4 layers design. 

We have gone through the Layout guidelines for the design as they are helpful but still do not specify or provide the significance of 4 layers in the design.

The following are the Consumption and environmental conditions where we are deploying our product.

1. Temperature range (from -10 degree to 50 degrees)

2. Continuous current consumption of 3 to 3.5 amps

So, we would like to know whether it is advisable to make the same design using 2 layers keeping above use-cases in mind. If so, I would also like to know PCB design consideration for the 2 layer design and what points need to be followed so that BMS will not get heated.
  • Hi Kunal,

    The 4 layers using 2oz copper gives the optimal heat sinking for highest charge current (5A).  Also, we needed the extra layers to be able to add test points and connectors that you will not need.  

    With only 3-3.5A, you should be able to use 2 layers, 2oz.  Please ensure that the QFN package's thermal pad has the recommended number of vias to as much unbroken copper as possible.  You will need to use vias to return the PMID and REGN capacitors' ground pads to the IC GND for shortest possible connection, even if that means pushing the inductor further away from the IC.  BTST capacitor also needs to low resistance, close connection to IC.  

    Regards,

    Jeff