Other Parts Discussed in Thread: TPS92515, TPS92515HV
When designed to have a 700mA output current, it often generates a 720mA output instead. It is related to the start-up, where the input voltage ramps up quite repeatedly and noisy. When in this 720mA mode, a IADJ dim. down and up (2V to 0V to 2V) does not affect the mode, it still returns to 720mA (at max dim.). Our guess is that it relates to the high-side comparator, which maybe compensates an offset, at start-up, and is disturbed by the rapid input voltage ramp up and noise?
It should be noted that this is not at tolerance issue, IADJ is exactly the same voltage in both cases, but output current has these two levels/modes (700mA and 720mA), which changes on a power cycle. Furthermore, is it not a device tolerance, as this is observed on the same device, in the same circuit. So the conclusion is that it relates to how the IC initializes.
Moreover, it is observed that if the IC is "reset", by shorting Vcc, it comes out the the 720mA mode. Possibly because the offset compensation is not disturbed by the startup, as this is at a steady input voltage. Can you assist on what could be the problem?
A workaround could be to force a "reset" (short Vcc for 1-10ms), but is this advisable?
Regards Martin